Commit e5df16d9 authored Jun 07, 2023 by Alex Deucher

drm/amdgpu/sdma4: set align mask to 255



The wptr needs to be incremented at at least 64 dword intervals,
use 256 to align with windows.  This should fix potential hangs
with unaligned updates.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 740f42a2

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -2312,7 +2312,7 @@ const struct amd_ip_funcs sdma_v4_0_ip_funcs = {

		static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs = {
		.type = AMDGPU_RING_TYPE_SDMA,
		.align_mask = 0xf,
		.align_mask = 0xff,
		.nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
		.support_64bit_ptrs = true,
		.secure_submission_supported = true,
		@@ -2344,7 +2344,7 @@ static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs = {

		static const struct amdgpu_ring_funcs sdma_v4_0_page_ring_funcs = {
		.type = AMDGPU_RING_TYPE_SDMA,
		.align_mask = 0xf,
		.align_mask = 0xff,
		.nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
		.support_64bit_ptrs = true,
		.secure_submission_supported = true,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -1825,7 +1825,7 @@ const struct amd_ip_funcs sdma_v4_4_2_ip_funcs = {

		static const struct amdgpu_ring_funcs sdma_v4_4_2_ring_funcs = {
		.type = AMDGPU_RING_TYPE_SDMA,
		.align_mask = 0xf,
		.align_mask = 0xff,
		.nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
		.support_64bit_ptrs = true,
		.get_rptr = sdma_v4_4_2_ring_get_rptr,
		@@ -1856,7 +1856,7 @@ static const struct amdgpu_ring_funcs sdma_v4_4_2_ring_funcs = {

		static const struct amdgpu_ring_funcs sdma_v4_4_2_page_ring_funcs = {
		.type = AMDGPU_RING_TYPE_SDMA,
		.align_mask = 0xf,
		.align_mask = 0xff,
		.nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
		.support_64bit_ptrs = true,
		.get_rptr = sdma_v4_4_2_ring_get_rptr,