Commit e63fe2d3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2023-11-17' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Daniel Vetter:
 "This is a 'blast from the bast' fixes pull, because it contains a
  bunch of AGP fixes for amdgpu. Otherwise nothing out of the ordinary.

  Next week is back to Dave unless he's knocked out by some conference
  bug.

   - amdgpu: fixes all over, including a set of AGP fixes

   - nouvea: GSP + other bugfixes

   - ivpu build fix

   - lenovo legion go panel orientation quirk"

* tag 'drm-fixes-2023-11-17' of git://anongit.freedesktop.org/drm/drm: (30 commits)
  drm/amdgpu/gmc9: disable AGP aperture
  drm/amdgpu/gmc10: disable AGP aperture
  drm/amdgpu/gmc11: disable AGP aperture
  drm/amdgpu: add a module parameter to control the AGP aperture
  drm/amdgpu/gmc11: fix logic typo in AGP check
  drm/amd/display: Fix encoder disable logic
  drm/amd/display: Change the DMCUB mailbox memory location from FB to inbox
  drm/amdgpu: add and populate the port num into xgmi topology info
  drm/amd/display: Negate IPS allow and commit bits
  drm/amd/pm: Don't send unload message for reset
  drm/amdgpu: fix ras err_data null pointer issue in amdgpu_ras.c
  drm/amd/display: Clear dpcd_sink_ext_caps if not set
  drm/amd/display: Enable fast plane updates on DCN3.2 and above
  drm/amd/display: fix NULL dereference
  drm/amd/display: fix a NULL pointer dereference in amdgpu_dm_i2c_xfer()
  drm/amd/display: Add null checks for 8K60 lightup
  drm/amd/pm: Fill pcie error counters for gpu v1_4
  drm/amd/pm: Update metric table for smu v13_0_6
  drm/amdgpu: correct chunk_ptr to a pointer to chunk.
  drm/amd/display: Fix DSC not Enabled on Direct MST Sink
  ...
parents 6bc40e44 86d8f905

drivers/accel/ivpu/ivpu_pm.c

+0 −3
Original line number Diff line number Diff line
@@ -250,9 +250,6 @@ int ivpu_rpm_get_if_active(struct ivpu_device *vdev) 
{

	int ret;



	ivpu_dbg(vdev, RPM, "rpm_get_if_active count %d\n",

		 atomic_read(&vdev->drm.dev->power.usage_count));



	ret = pm_runtime_get_if_active(vdev->drm.dev, false);

	drm_WARN_ON(&vdev->drm, ret < 0);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -248,6 +248,7 @@ extern int amdgpu_umsch_mm; 
extern int amdgpu_seamless;



extern int amdgpu_user_partt_mode;

extern int amdgpu_agp;



#define AMDGPU_VM_MAX_NUM_CTX			4096

#define AMDGPU_SG_THRESHOLD			(256*1024*1024)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+1 −1
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p, 
	}



	for (i = 0; i < p->nchunks; i++) {

		struct drm_amdgpu_cs_chunk __user **chunk_ptr = NULL;

		struct drm_amdgpu_cs_chunk __user *chunk_ptr = NULL;

		struct drm_amdgpu_cs_chunk user_chunk;

		uint32_t __user *cdata;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+10 −0
Original line number Diff line number Diff line
@@ -207,6 +207,7 @@ int amdgpu_user_partt_mode = AMDGPU_AUTO_COMPUTE_PARTITION_MODE; 
int amdgpu_umsch_mm;

int amdgpu_seamless = -1; /* auto */

uint amdgpu_debug_mask;

int amdgpu_agp = -1; /* auto */



static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
@@ -961,6 +962,15 @@ module_param_named(seamless, amdgpu_seamless, int, 0444); 
MODULE_PARM_DESC(debug_mask, "debug options for amdgpu, disabled by default");

module_param_named(debug_mask, amdgpu_debug_mask, uint, 0444);



/**

 * DOC: agp (int)

 * Enable the AGP aperture.  This provides an aperture in the GPU's internal

 * address space for direct access to system memory.  Note that these accesses

 * are non-snooped, so they are only used for access to uncached memory.

 */

MODULE_PARM_DESC(agp, "AGP (-1 = auto (default), 0 = disable, 1 = enable)");

module_param_named(agp, amdgpu_agp, int, 0444);



/* These devices are not supported by amdgpu.

 * They are supported by the mach64, r128, radeon drivers

 */

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+5 −0
Original line number Diff line number Diff line
@@ -1473,6 +1473,11 @@ int psp_xgmi_get_topology_info(struct psp_context *psp, 
				topology->nodes[i].num_links = (requires_reflection && topology->nodes[i].num_links) ?

								topology->nodes[i].num_links : node_num_links;

			}

			/* popluate the connected port num info if supported and available */

			if (ta_port_num_support && topology->nodes[i].num_links) {

				memcpy(topology->nodes[i].port_num, link_extend_info_output->nodes[i].port_num,

				       sizeof(struct xgmi_connected_port_num) * TA_XGMI__MAX_PORT_NUM);

			}



			/* reflect the topology information for bi-directionality */

			if (requires_reflection && topology->nodes[i].num_hops)