Commit e7173009 authored by Bryan O'Donoghue's avatar Bryan O'Donoghue Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8250: camss: Add CCI definitions 



sm8250 has two CCI busses with two I2C busses apiece.

Co-developed-by: default avatarJulian Grahsl <jgrahsl@snap.com>
Signed-off-by: default avatarJulian Grahsl <jgrahsl@snap.com>
Reviewed-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415164655.1679628-4-bryan.odonoghue@linaro.org
parent 30325603

arch/arm64/boot/dts/qcom/sm8250.dtsi

+162 −0
Original line number Diff line number Diff line
@@ -3150,6 +3150,88 @@ videocc: clock-controller@abf0000 { 
			#power-domain-cells = <1>;

		};



		cci0: cci@ac4f000 {

			compatible = "qcom,sm8250-cci";

			#address-cells = <1>;

			#size-cells = <0>;



			reg = <0 0x0ac4f000 0 0x1000>;

			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;

			power-domains = <&camcc TITAN_TOP_GDSC>;



			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,

				 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,

				 <&camcc CAM_CC_CPAS_AHB_CLK>,

				 <&camcc CAM_CC_CCI_0_CLK>,

				 <&camcc CAM_CC_CCI_0_CLK_SRC>;

			clock-names = "camnoc_axi",

				      "slow_ahb_src",

				      "cpas_ahb",

				      "cci",

				      "cci_src";



			pinctrl-0 = <&cci0_default>;

			pinctrl-1 = <&cci0_sleep>;

			pinctrl-names = "default", "sleep";



			status = "disabled";



			cci0_i2c0: i2c-bus@0 {

				reg = <0>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			cci0_i2c1: i2c-bus@1 {

				reg = <1>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};

		};



		cci1: cci@ac50000 {

			compatible = "qcom,sm8250-cci";

			#address-cells = <1>;

			#size-cells = <0>;



			reg = <0 0x0ac50000 0 0x1000>;

			interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;

			power-domains = <&camcc TITAN_TOP_GDSC>;



			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,

				 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,

				 <&camcc CAM_CC_CPAS_AHB_CLK>,

				 <&camcc CAM_CC_CCI_1_CLK>,

				 <&camcc CAM_CC_CCI_1_CLK_SRC>;

			clock-names = "camnoc_axi",

				      "slow_ahb_src",

				      "cpas_ahb",

				      "cci",

				      "cci_src";



			pinctrl-0 = <&cci1_default>;

			pinctrl-1 = <&cci1_sleep>;

			pinctrl-names = "default", "sleep";



			status = "disabled";



			cci1_i2c0: i2c-bus@0 {

				reg = <0>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			cci1_i2c1: i2c-bus@1 {

				reg = <1>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};

		};



		camss: camss@ac6a000 {

			compatible = "qcom,sm8250-camss";

			status = "disabled";
@@ -3688,6 +3770,86 @@ tlmm: pinctrl@f100000 { 
			gpio-ranges = <&tlmm 0 0 181>;

			wakeup-parent = <&pdc>;



			cci0_default: cci0-default {

				cci0_i2c0_default: cci0-i2c0-default {

					/* SDA, SCL */

					pins = "gpio101", "gpio102";

					function = "cci_i2c";



					bias-pull-up;

					drive-strength = <2>; /* 2 mA */

				};



				cci0_i2c1_default: cci0-i2c1-default {

					/* SDA, SCL */

					pins = "gpio103", "gpio104";

					function = "cci_i2c";



					bias-pull-up;

					drive-strength = <2>; /* 2 mA */

				};

			};



			cci0_sleep: cci0-sleep {

				cci0_i2c0_sleep: cci0-i2c0-sleep {

					/* SDA, SCL */

					pins = "gpio101", "gpio102";

					function = "cci_i2c";



					drive-strength = <2>; /* 2 mA */

					bias-pull-down;

				};



				cci0_i2c1_sleep: cci0-i2c1-sleep {

					/* SDA, SCL */

					pins = "gpio103", "gpio104";

					function = "cci_i2c";



					drive-strength = <2>; /* 2 mA */

					bias-pull-down;

				};

			};



			cci1_default: cci1-default {

				cci1_i2c0_default: cci1-i2c0-default {

					/* SDA, SCL */

					pins = "gpio105","gpio106";

					function = "cci_i2c";



					bias-pull-up;

					drive-strength = <2>; /* 2 mA */

				};



				cci1_i2c1_default: cci1-i2c1-default {

					/* SDA, SCL */

					pins = "gpio107","gpio108";

					function = "cci_i2c";



					bias-pull-up;

					drive-strength = <2>; /* 2 mA */

				};

			};



			cci1_sleep: cci1-sleep {

				cci1_i2c0_sleep: cci1-i2c0-sleep {

					/* SDA, SCL */

					pins = "gpio105","gpio106";

					function = "cci_i2c";



					bias-pull-down;

					drive-strength = <2>; /* 2 mA */

				};



				cci1_i2c1_sleep: cci1-i2c1-sleep {

					/* SDA, SCL */

					pins = "gpio107","gpio108";

					function = "cci_i2c";



					bias-pull-down;

					drive-strength = <2>; /* 2 mA */

				};

			};



			pri_mi2s_active: pri-mi2s-active {

				sclk {

					pins = "gpio138";