Commit e71dc5bf authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer
Browse files

Merge tag 'mips-fixes_6.4_1' into mips-next 

- fixes to get alchemy platform back in shape
- fix for initrd detection
parents 12324a88 4897a898

arch/mips/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ config MIPS 
	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION

	select HAVE_MOD_ARCH_SPECIFIC

	select HAVE_NMI

	select HAVE_PATA_PLATFORM

	select HAVE_PERF_EVENTS

	select HAVE_PERF_REGS

	select HAVE_PERF_USER_STACK_DUMP

arch/mips/alchemy/common/dbdma.c

+15 −12
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
 *

 */



#include <linux/dma-map-ops.h> /* for dma_default_coherent */

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/slab.h>
@@ -623,17 +624,18 @@ u32 au1xxx_dbdma_put_source(u32 chanid, dma_addr_t buf, int nbytes, u32 flags) 
		dp->dscr_cmd0 &= ~DSCR_CMD0_IE;



	/*

	 * There is an errata on the Au1200/Au1550 parts that could result

	 * in "stale" data being DMA'ed. It has to do with the snoop logic on

	 * the cache eviction buffer.  DMA_NONCOHERENT is on by default for

	 * these parts. If it is fixed in the future, these dma_cache_inv will

	 * just be nothing more than empty macros. See io.h.

	 * There is an erratum on certain Au1200/Au1550 revisions that could

	 * result in "stale" data being DMA'ed. It has to do with the snoop

	 * logic on the cache eviction buffer.  dma_default_coherent is set

	 * to false on these parts.

	 */

	dma_cache_wback_inv((unsigned long)buf, nbytes);

	if (!dma_default_coherent)

		dma_cache_wback_inv(KSEG0ADDR(buf), nbytes);

	dp->dscr_cmd0 |= DSCR_CMD0_V;	/* Let it rip */

	wmb(); /* drain writebuffer */

	dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));

	ctp->chan_ptr->ddma_dbell = 0;

	wmb(); /* force doorbell write out to dma engine */



	/* Get next descriptor pointer. */

	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
@@ -685,17 +687,18 @@ u32 au1xxx_dbdma_put_dest(u32 chanid, dma_addr_t buf, int nbytes, u32 flags) 
			  dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);

#endif

	/*

	 * There is an errata on the Au1200/Au1550 parts that could result in

	 * "stale" data being DMA'ed. It has to do with the snoop logic on the

	 * cache eviction buffer.  DMA_NONCOHERENT is on by default for these

	 * parts. If it is fixed in the future, these dma_cache_inv will just

	 * be nothing more than empty macros. See io.h.

	 * There is an erratum on certain Au1200/Au1550 revisions that could

	 * result in "stale" data being DMA'ed. It has to do with the snoop

	 * logic on the cache eviction buffer.  dma_default_coherent is set

	 * to false on these parts.

	 */

	dma_cache_inv((unsigned long)buf, nbytes);

	if (!dma_default_coherent)

		dma_cache_inv(KSEG0ADDR(buf), nbytes);

	dp->dscr_cmd0 |= DSCR_CMD0_V;	/* Let it rip */

	wmb(); /* drain writebuffer */

	dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));

	ctp->chan_ptr->ddma_dbell = 0;

	wmb(); /* force doorbell write out to dma engine */



	/* Get next descriptor pointer. */

	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));

arch/mips/kernel/cpu-probe.c

+5 −0
Original line number Diff line number Diff line
@@ -1502,6 +1502,10 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) 
			break;

		}

		break;

	case PRID_IMP_NETLOGIC_AU13XX:

		c->cputype = CPU_ALCHEMY;

		__cpu_name[cpu] = "Au1300";

		break;

	}

}
@@ -1863,6 +1867,7 @@ void cpu_probe(void) 
		cpu_probe_mips(c, cpu);

		break;

	case PRID_COMP_ALCHEMY:

	case PRID_COMP_NETLOGIC:

		cpu_probe_alchemy(c, cpu);

		break;

	case PRID_COMP_SIBYTE:

arch/mips/kernel/setup.c

+5 −4
Original line number Diff line number Diff line
@@ -158,10 +158,6 @@ static unsigned long __init init_initrd(void) 
		pr_err("initrd start must be page aligned\n");

		goto disable;

	}

	if (initrd_start < PAGE_OFFSET) {

		pr_err("initrd start < PAGE_OFFSET\n");

		goto disable;

	}



	/*

	 * Sanitize initrd addresses. For example firmware
@@ -174,6 +170,11 @@ static unsigned long __init init_initrd(void) 
	initrd_end = (unsigned long)__va(end);

	initrd_start = (unsigned long)__va(__pa(initrd_start));



	if (initrd_start < PAGE_OFFSET) {

		pr_err("initrd start < PAGE_OFFSET\n");

		goto disable;

	}



	ROOT_DEV = Root_RAM0;

	return PFN_UP(end);

disable: