Commit e753c16c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-fix-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi fixes from Mark Brown:
 "A couple of changes here, one update to MAINTAINERS for the AMD
  controller and a chnage from Pei Xiao which in spite of the changelog
  is actually a fix - previously the zynq-qspi driver leaked a clock
  enable for every flash operation it did which isn't good, these extra
  enables were removed when doing the enable cleanup which are probably
  a good idea anyway"

* tag 'spi-fix-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  MAINTAINERS: Update AMD SPI driver maintainers
  spi: zynq-qspi: Simplify clock handling with devm_clk_get_enabled()
parents e8ab3110 705355a8

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -1272,6 +1272,7 @@ F: drivers/hid/amd-sfh-hid/ 








AMD SPI DRIVER









M:	Raju Rangoju <Raju.Rangoju@amd.com>









M:	Krishnamoorthi M <krishnamoorthi.m@amd.com>









L:	linux-spi@vger.kernel.org









S:	Supported









F:	drivers/spi/spi-amd-pci.c
































drivers/spi/spi-zynq-qspi.c



+6
−36






























Original line number
Diff line number
Diff line







@@ -381,21 +381,10 @@ static int zynq_qspi_setup_op(struct spi_device *spi)







{









	struct spi_controller *ctlr = spi->controller;









	struct zynq_qspi *qspi = spi_controller_get_devdata(ctlr);









	int ret;



















	if (ctlr->busy)









		return -EBUSY;



















	ret = clk_enable(qspi->refclk);









	if (ret)









		return ret;



















	ret = clk_enable(qspi->pclk);









	if (ret) {









		clk_disable(qspi->refclk);









		return ret;









	}



















	zynq_qspi_write(qspi, ZYNQ_QSPI_ENABLE_OFFSET,









			ZYNQ_QSPI_ENABLE_ENABLE_MASK);


















@@ -661,7 +650,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)







		goto remove_ctlr;









	}



















	xqspi->pclk = devm_clk_get(&pdev->dev, "pclk");









	xqspi->pclk = devm_clk_get_enabled(&pdev->dev, "pclk");









	if (IS_ERR(xqspi->pclk)) {









		dev_err(&pdev->dev, "pclk clock not found.\n");









		ret = PTR_ERR(xqspi->pclk);








@@ -670,36 +659,24 @@ static int zynq_qspi_probe(struct platform_device *pdev)

















	init_completion(&xqspi->data_completion);



















	xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk");









	xqspi->refclk = devm_clk_get_enabled(&pdev->dev, "ref_clk");









	if (IS_ERR(xqspi->refclk)) {









		dev_err(&pdev->dev, "ref_clk clock not found.\n");









		ret = PTR_ERR(xqspi->refclk);









		goto remove_ctlr;









	}



















	ret = clk_prepare_enable(xqspi->pclk);









	if (ret) {









		dev_err(&pdev->dev, "Unable to enable APB clock.\n");









		goto remove_ctlr;









	}



















	ret = clk_prepare_enable(xqspi->refclk);









	if (ret) {









		dev_err(&pdev->dev, "Unable to enable device clock.\n");









		goto clk_dis_pclk;









	}



















	xqspi->irq = platform_get_irq(pdev, 0);









	if (xqspi->irq < 0) {









		ret = xqspi->irq;









		goto clk_dis_all;









		goto remove_ctlr;









	}









	ret = devm_request_irq(&pdev->dev, xqspi->irq, zynq_qspi_irq,









			       0, pdev->name, xqspi);









	if (ret != 0) {









		ret = -ENXIO;









		dev_err(&pdev->dev, "request_irq failed\n");









		goto clk_dis_all;









		goto remove_ctlr;









	}



















	ret = of_property_read_u32(np, "num-cs",








@@ -709,7 +686,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)







	} else if (num_cs > ZYNQ_QSPI_MAX_NUM_CS) {









		ret = -EINVAL;









		dev_err(&pdev->dev, "only 2 chip selects are available\n");









		goto clk_dis_all;









		goto remove_ctlr;









	} else {









		ctlr->num_chipselect = num_cs;









	}








@@ -728,15 +705,11 @@ static int zynq_qspi_probe(struct platform_device *pdev)







	ret = devm_spi_register_controller(&pdev->dev, ctlr);









	if (ret) {









		dev_err(&pdev->dev, "devm_spi_register_controller failed\n");









		goto clk_dis_all;









		goto remove_ctlr;









	}



















	return ret;



















clk_dis_all:









	clk_disable_unprepare(xqspi->refclk);









clk_dis_pclk:









	clk_disable_unprepare(xqspi->pclk);









remove_ctlr:









	spi_controller_put(ctlr);


















@@ -758,9 +731,6 @@ static void zynq_qspi_remove(struct platform_device *pdev)







	struct zynq_qspi *xqspi = platform_get_drvdata(pdev);



















	zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0);



















	clk_disable_unprepare(xqspi->refclk);









	clk_disable_unprepare(xqspi->pclk);









}



















static const struct of_device_id zynq_qspi_of_match[] = {