Commit e75504b1 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: fix dcn fe reset memory access error 



Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f669089a

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+4 −3
Original line number Diff line number Diff line
@@ -853,8 +853,9 @@ static void plane_atomic_disable(struct core_dc *dc, 
	struct dce_hwseq *hws = dc->hwseq;

	struct mem_input *mi = dc->res_pool->mis[fe_idx];

	struct mpc *mpc = dc->res_pool->mpc;

	int opp_id = mi->opp_id;



	if (mi->opp_id == 0xf)

	if (opp_id == 0xf)

		return;



	mpc->funcs->wait_for_idle(mpc, mi->mpcc_id);
@@ -876,8 +877,8 @@ static void plane_atomic_disable(struct core_dc *dc, 
	REG_UPDATE(DPP_CONTROL[fe_idx],

			DPP_CLOCK_ENABLE, 0);



	if (dc->res_pool->opps[mi->opp_id]->mpc_tree.num_pipes == 0)

		REG_UPDATE(OPP_PIPE_CONTROL[mi->opp_id],

	if (dc->res_pool->opps[opp_id]->mpc_tree.num_pipes == 0)

		REG_UPDATE(OPP_PIPE_CONTROL[opp_id],

				OPP_PIPE_CLOCK_EN, 0);



	if (dc->public.debug.sanity_checks)