Commit e7b3c64a authored by Peter Wang's avatar Peter Wang Committed by Martin K. Petersen
Browse files

scsi: ufs: mediatek: TX skew fix 



Fix Mediatek TX skew issue by checking dts setting and vendor/model. Then
set PA_TACTIVATE to 8.

Signed-off-by: default avatarPeter Wang <peter.wang@mediatek.com>
Acked-by: default avatarChun-Hung Wu <Chun-Hung.Wu@mediatek.com>
Reviewed-by: default avatarAvri Altman <avri.altman@wdc.com>
Link: https://lore.kernel.org/r/20240315083448.7185-3-peter.wang@mediatek.com


Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 1c5e7221

drivers/ufs/host/ufs-mediatek.c

+21 −0
Original line number Diff line number Diff line
@@ -118,6 +118,13 @@ static bool ufs_mtk_is_pmc_via_fastauto(struct ufs_hba *hba) 
	return !!(host->caps & UFS_MTK_CAP_PMC_VIA_FASTAUTO);

}



static bool ufs_mtk_is_tx_skew_fix(struct ufs_hba *hba)

{

	struct ufs_mtk_host *host = ufshcd_get_variant(hba);



	return (host->caps & UFS_MTK_CAP_TX_SKEW_FIX);

}



static bool ufs_mtk_is_allow_vccqx_lpm(struct ufs_hba *hba)

{

	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -629,6 +636,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) 
	if (of_property_read_bool(np, "mediatek,ufs-pmc-via-fastauto"))

		host->caps |= UFS_MTK_CAP_PMC_VIA_FASTAUTO;



	if (of_property_read_bool(np, "mediatek,ufs-tx-skew-fix"))

		host->caps |= UFS_MTK_CAP_TX_SKEW_FIX;



	dev_info(hba->dev, "caps: 0x%x", host->caps);

}
@@ -1455,6 +1465,17 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba) 
	if (mid == UFS_VENDOR_SAMSUNG) {

		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6);

		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 10);

	} else if (mid == UFS_VENDOR_MICRON) {

		/* Only for the host which have TX skew issue */

		if (ufs_mtk_is_tx_skew_fix(hba) &&

			(STR_PRFX_EQUAL("MT128GBCAV2U31", dev_info->model) ||

			STR_PRFX_EQUAL("MT256GBCAV4U31", dev_info->model) ||

			STR_PRFX_EQUAL("MT512GBCAV8U31", dev_info->model) ||

			STR_PRFX_EQUAL("MT256GBEAX4U40", dev_info->model) ||

			STR_PRFX_EQUAL("MT512GAYAX4U40", dev_info->model) ||

			STR_PRFX_EQUAL("MT001TAYAX8U40", dev_info->model))) {

			ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 8);

		}

	}



	/*

drivers/ufs/host/ufs-mediatek.h

+1 −0
Original line number Diff line number Diff line
@@ -142,6 +142,7 @@ enum ufs_mtk_host_caps { 
	 */

	UFS_MTK_CAP_ALLOW_VCCQX_LPM            = 1 << 5,

	UFS_MTK_CAP_PMC_VIA_FASTAUTO           = 1 << 6,

	UFS_MTK_CAP_TX_SKEW_FIX                = 1 << 7,

};



struct ufs_mtk_crypt_cfg {