Commit e84d716d authored by Thomas Hellström's avatar Thomas Hellström Committed by Rodrigo Vivi
Browse files

drm/xe: Restrict huge PTEs to 1GiB 



Add a define for the highest level for which we can encode a huge PTE,
and use it for page-table building. Also update an assert that checks that
we don't try to encode for larger sizes.

Signed-off-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarBrian Welty <brian.welty@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231209151843.7903-2-thomas.hellstrom@linux.intel.com


Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 1c8e9019

drivers/gpu/drm/xe/xe_pt.c

+3 −0
Original line number Diff line number Diff line
@@ -430,6 +430,9 @@ static bool xe_pt_hugepte_possible(u64 addr, u64 next, unsigned int level, 
{

	u64 size, dma;



	if (level > MAX_HUGEPTE_LEVEL)

		return false;



	/* Does the virtual range requested cover a huge pte? */

	if (!xe_pt_covers(addr, next, level, &xe_walk->base))

		return false;

drivers/gpu/drm/xe/xe_pt.h

+3 −0
Original line number Diff line number Diff line
@@ -18,6 +18,9 @@ struct xe_tile; 
struct xe_vm;

struct xe_vma;



/* Largest huge pte is currently 1GiB. May become device dependent. */

#define MAX_HUGEPTE_LEVEL 2



#define xe_pt_write(xe, map, idx, data) \

	xe_map_wr(xe, map, (idx) * sizeof(u64), u64, data)

drivers/gpu/drm/xe/xe_vm.c

+1 −1
Original line number Diff line number Diff line
@@ -1258,7 +1258,7 @@ static u64 pte_encode_pat_index(struct xe_device *xe, u16 pat_index, 


static u64 pte_encode_ps(u32 pt_level)

{

	XE_WARN_ON(pt_level > 2);

	XE_WARN_ON(pt_level > MAX_HUGEPTE_LEVEL);



	if (pt_level == 1)

		return XE_PDE_PS_2M;