Commit e857cded authored by Dragan Simic's avatar Dragan Simic Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: linewrap gmac assigned-clocks on Quartz64 Model A/B files a bit 



Going over the 80-column width limit, and using all 100 columns, is intended
for improving code readability.  This wasn't the case in a few places in the
Quartz64 Model A/B board dts files, so let's reflow them a bit, to both obey
the 80-column limit and make them a bit more readable.

No intended functional changes are introduced by these changes.

Signed-off-by: default avatarDragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/7eea4ebdb19d5f43d24074a166e6c46bb5424d46.1739218324.git.dsimic@manjaro.org


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent b3dc2a93

arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts

+6 −2
Original line number Diff line number Diff line
@@ -265,8 +265,12 @@ map1 { 
};



&gmac1 {

	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;

	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;

	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>,

			  <&cru SCLK_GMAC1_RGMII_SPEED>,

			  <&cru SCLK_GMAC1>;

	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,

				 <&cru SCLK_GMAC1>,

				 <&gmac1_clkin>;

	clock_in_out = "input";

	phy-supply = <&vcc_3v3>;

	phy-mode = "rgmii";

arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts

+6 −2
Original line number Diff line number Diff line
@@ -173,8 +173,12 @@ &cpu3 { 
};



&gmac1 {

	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;

	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;

	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>,

			  <&cru SCLK_GMAC1_RGMII_SPEED>,

			  <&cru SCLK_GMAC1>;

	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,

				 <&cru SCLK_GMAC1>,

				 <&gmac1_clkin>;

	clock_in_out = "input";

	phy-mode = "rgmii";

	phy-supply = <&vcc_3v3>;