Commit e85cbb34 authored Aug 09, 2023 by Eric Chanudet Committed by Bjorn Andersson Aug 10, 2023

arm64: dts: qcom: sa8540p-ride: enable rtc

SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/20230202155448.6715-1-johan+linaro@kernel.org/



Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
    commit e67b4558 ("arm64: dts: qcom: sc8280xp-crd: enable rtc")

On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Link: https://lore.kernel.org/r/20230809203506.1833205-1-echanude@redhat.com


Signed-off-by: Bjorn Andersson <andersson@kernel.org>

parent 605a981e

arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi

+10 −1

Original line number	Diff line number	Diff line
		@@ -14,7 +14,7 @@ pmm8540a: pmic@0 {
		#address-cells = <1>;
		#size-cells = <0>;

		rtc@6000 {
		pmm8540a_rtc: rtc@6000 {
		compatible = "qcom,pm8941-rtc";
		reg = <0x6000>, <0x6100>;
		reg-names = "rtc", "alarm";
		@@ -39,6 +39,15 @@ pmm8540c: pmic@4 {
		#address-cells = <1>;
		#size-cells = <0>;

		pmm8540c_sdam_2: nvram@b110 {
		compatible = "qcom,spmi-sdam";
		reg = <0xb110>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0xb110 0xb0>;
		status = "disabled";
		};

		pmm8540c_gpios: gpio@c000 {
		compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
		reg = <0xc000>;

arch/arm64/boot/dts/qcom/sa8540p-ride.dts

+15 −0

Original line number	Diff line number	Diff line
		@@ -407,6 +407,21 @@ &pcie3a_phy {
		status = "okay";
		};

		&pmm8540a_rtc {
		nvmem-cells = <&rtc_offset>;
		nvmem-cell-names = "offset";

		status = "okay";
		};

		&pmm8540c_sdam_2 {
		status = "okay";

		rtc_offset: rtc-offset@a0 {
		reg = <0xa0 0x4>;
		};
		};

		&qup0 {
		status = "okay";
		};