Commit e8cca466 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

Merge branches 'iommu/fixes', 'arm/tegra', 'arm/smmu', 'virtio', 'x86/vt-d',... 

Merge branches 'iommu/fixes', 'arm/tegra', 'arm/smmu', 'virtio', 'x86/vt-d', 'x86/amd', 'core' and 's390' into next
parents 6e6c6d6b f7da9c08 aa5cabc4 9e13ec61 e82c175e cedc811c 36130472 92bce97f

Documentation/admin-guide/kernel-parameters.txt

+5 −4
Original line number Diff line number Diff line
@@ -2220,7 +2220,7 @@ 
			  forcing Dual Address Cycle for PCI cards supporting

			  greater than 32-bit addressing.



	iommu.strict=	[ARM64, X86] Configure TLB invalidation behaviour

	iommu.strict=	[ARM64, X86, S390] Configure TLB invalidation behaviour

			Format: { "0" | "1" }

			0 - Lazy mode.

			  Request that DMA unmap operations use deferred
@@ -5611,9 +5611,10 @@ 
	s390_iommu=	[HW,S390]

			Set s390 IOTLB flushing mode

		strict

			With strict flushing every unmap operation will result in

			an IOTLB flush. Default is lazy flushing before reuse,

			which is faster.

			With strict flushing every unmap operation will result

			in an IOTLB flush. Default is lazy flushing before

			reuse, which is faster. Deprecated, equivalent to

			iommu.strict=1.



	s390_iommu_aperture=	[KNL,S390]

			Specifies the size of the per device DMA address space

Documentation/devicetree/bindings/iommu/arm,smmu.yaml

+2 −0
Original line number Diff line number Diff line
@@ -110,6 +110,7 @@ properties: 
              - qcom,sdm630-smmu-v2

              - qcom,sdm845-smmu-v2

              - qcom,sm6350-smmu-v2

              - qcom,sm7150-smmu-v2

          - const: qcom,adreno-smmu

          - const: qcom,smmu-v2

      - description: Qcom Adreno GPUs on Google Cheza platform
@@ -409,6 +410,7 @@ allOf: 
          contains:

            enum:

              - qcom,sm6350-smmu-v2

              - qcom,sm7150-smmu-v2

              - qcom,sm8150-smmu-500

              - qcom,sm8250-smmu-500

    then:

arch/arm/configs/multi_v7_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -1073,7 +1073,6 @@ CONFIG_QCOM_IPCC=y 
CONFIG_OMAP_IOMMU=y

CONFIG_OMAP_IOMMU_DEBUG=y

CONFIG_ROCKCHIP_IOMMU=y

CONFIG_TEGRA_IOMMU_GART=y

CONFIG_TEGRA_IOMMU_SMMU=y

CONFIG_EXYNOS_IOMMU=y

CONFIG_QCOM_IOMMU=y

arch/arm/configs/tegra_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -292,7 +292,6 @@ CONFIG_CHROME_PLATFORMS=y 
CONFIG_CROS_EC=y

CONFIG_CROS_EC_I2C=m

CONFIG_CROS_EC_SPI=m

CONFIG_TEGRA_IOMMU_GART=y

CONFIG_TEGRA_IOMMU_SMMU=y

CONFIG_ARCH_TEGRA_2x_SOC=y

CONFIG_ARCH_TEGRA_3x_SOC=y

arch/powerpc/kernel/iommu.c

+24 −29
Original line number Diff line number Diff line
@@ -1280,13 +1280,19 @@ struct iommu_table_group_ops spapr_tce_table_group_ops = { 
/*

 * A simple iommu_ops to allow less cruft in generic VFIO code.

 */

static int spapr_tce_blocking_iommu_attach_dev(struct iommu_domain *dom,

static int

spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain,

				    struct device *dev)

{

	struct iommu_domain *domain = iommu_get_domain_for_dev(dev);

	struct iommu_group *grp = iommu_group_get(dev);

	struct iommu_table_group *table_group;

	int ret = -EINVAL;



	/* At first attach the ownership is already set */

	if (!domain)

		return 0;



	if (!grp)

		return -ENODEV;
@@ -1297,17 +1303,22 @@ static int spapr_tce_blocking_iommu_attach_dev(struct iommu_domain *dom, 
	return ret;

}



static void spapr_tce_blocking_iommu_set_platform_dma(struct device *dev)

{

	struct iommu_group *grp = iommu_group_get(dev);

	struct iommu_table_group *table_group;

static const struct iommu_domain_ops spapr_tce_platform_domain_ops = {

	.attach_dev = spapr_tce_platform_iommu_attach_dev,

};



	table_group = iommu_group_get_iommudata(grp);

	table_group->ops->release_ownership(table_group);

}

static struct iommu_domain spapr_tce_platform_domain = {

	.type = IOMMU_DOMAIN_PLATFORM,

	.ops = &spapr_tce_platform_domain_ops,

};



static const struct iommu_domain_ops spapr_tce_blocking_domain_ops = {

	.attach_dev = spapr_tce_blocking_iommu_attach_dev,

static struct iommu_domain spapr_tce_blocked_domain = {

	.type = IOMMU_DOMAIN_BLOCKED,

	/*

	 * FIXME: SPAPR mixes blocked and platform behaviors, the blocked domain

	 * also sets the dma_api ops

	 */

	.ops = &spapr_tce_platform_domain_ops,

};



static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)
@@ -1322,22 +1333,6 @@ static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap) 
	return false;

}



static struct iommu_domain *spapr_tce_iommu_domain_alloc(unsigned int type)

{

	struct iommu_domain *dom;



	if (type != IOMMU_DOMAIN_BLOCKED)

		return NULL;



	dom = kzalloc(sizeof(*dom), GFP_KERNEL);

	if (!dom)

		return NULL;



	dom->ops = &spapr_tce_blocking_domain_ops;



	return dom;

}



static struct iommu_device *spapr_tce_iommu_probe_device(struct device *dev)

{

	struct pci_dev *pdev;
@@ -1371,12 +1366,12 @@ static struct iommu_group *spapr_tce_iommu_device_group(struct device *dev) 
}



static const struct iommu_ops spapr_tce_iommu_ops = {

	.default_domain = &spapr_tce_platform_domain,

	.blocked_domain = &spapr_tce_blocked_domain,

	.capable = spapr_tce_iommu_capable,

	.domain_alloc = spapr_tce_iommu_domain_alloc,

	.probe_device = spapr_tce_iommu_probe_device,

	.release_device = spapr_tce_iommu_release_device,

	.device_group = spapr_tce_iommu_device_group,

	.set_platform_dma_ops = spapr_tce_blocking_iommu_set_platform_dma,

};



static struct attribute *spapr_tce_iommu_attrs[] = {