Commit e927c520 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'loongarch-fixes-6.18-1' of... 

Merge tag 'loongarch-fixes-6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch fixes from Huacai Chen:

 - Fix a Rust build error

 - Fix exception/interrupt, memory management, perf event, hardware
   breakpoint, kexec and KVM bugs

* tag 'loongarch-fixes-6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: KVM: Fix max supported vCPUs set with EIOINTC
  LoongArch: KVM: Skip PMU checking on vCPU context switch
  LoongArch: KVM: Restore guest PMU if it is enabled
  LoongArch: KVM: Add delay until timer interrupt injected
  LoongArch: KVM: Set page with write attribute if dirty track disabled
  LoongArch: kexec: Print out debugging message if required
  LoongArch: kexec: Initialize the kexec_buf structure
  LoongArch: Use correct accessor to read FWPC/MWPC
  LoongArch: Refine the init_hw_perf_events() function
  LoongArch: Remove __GFP_HIGHMEM masking in pud_alloc_one()
  LoongArch: Let {pte,pmd}_modify() record the status of _PAGE_DIRTY
  LoongArch: Consolidate max_pfn & max_low_pfn calculation
  LoongArch: Consolidate early_ioremap()/ioremap_prot()
  LoongArch: Use physical addresses for CSR_MERRENTRY/CSR_TLBRENTRY
  LoongArch: Clarify 3 MSG interrupt features
  rust: Add -fno-isolate-erroneous-paths-dereference to bindgen_skip_c_flags
parents 89ee862a 237e74bf

arch/loongarch/include/asm/cpu-features.h

+2 −0
Original line number Diff line number Diff line
@@ -67,6 +67,8 @@ 
#define cpu_has_hypervisor	cpu_opt(LOONGARCH_CPU_HYPERVISOR)

#define cpu_has_ptw		cpu_opt(LOONGARCH_CPU_PTW)

#define cpu_has_lspw		cpu_opt(LOONGARCH_CPU_LSPW)

#define cpu_has_msgint		cpu_opt(LOONGARCH_CPU_MSGINT)

#define cpu_has_avecint		cpu_opt(LOONGARCH_CPU_AVECINT)

#define cpu_has_redirectint	cpu_opt(LOONGARCH_CPU_REDIRECTINT)



#endif /* __ASM_CPU_FEATURES_H */

arch/loongarch/include/asm/cpu.h

+5 −1
Original line number Diff line number Diff line
@@ -101,7 +101,9 @@ enum cpu_type_enum { 
#define CPU_FEATURE_HYPERVISOR		26	/* CPU has hypervisor (running in VM) */

#define CPU_FEATURE_PTW			27	/* CPU has hardware page table walker */

#define CPU_FEATURE_LSPW		28	/* CPU has LSPW (lddir/ldpte instructions) */

#define CPU_FEATURE_AVECINT		29	/* CPU has AVEC interrupt */

#define CPU_FEATURE_MSGINT		29	/* CPU has MSG interrupt */

#define CPU_FEATURE_AVECINT		30	/* CPU has AVEC interrupt */

#define CPU_FEATURE_REDIRECTINT		31	/* CPU has interrupt remapping */



#define LOONGARCH_CPU_CPUCFG		BIT_ULL(CPU_FEATURE_CPUCFG)

#define LOONGARCH_CPU_LAM		BIT_ULL(CPU_FEATURE_LAM)
@@ -132,6 +134,8 @@ enum cpu_type_enum { 
#define LOONGARCH_CPU_HYPERVISOR	BIT_ULL(CPU_FEATURE_HYPERVISOR)

#define LOONGARCH_CPU_PTW		BIT_ULL(CPU_FEATURE_PTW)

#define LOONGARCH_CPU_LSPW		BIT_ULL(CPU_FEATURE_LSPW)

#define LOONGARCH_CPU_MSGINT		BIT_ULL(CPU_FEATURE_MSGINT)

#define LOONGARCH_CPU_AVECINT		BIT_ULL(CPU_FEATURE_AVECINT)

#define LOONGARCH_CPU_REDIRECTINT	BIT_ULL(CPU_FEATURE_REDIRECTINT)



#endif /* _ASM_CPU_H */

arch/loongarch/include/asm/hw_breakpoint.h

+2 −2
Original line number Diff line number Diff line
@@ -134,13 +134,13 @@ static inline void hw_breakpoint_thread_switch(struct task_struct *next) 
/* Determine number of BRP registers available. */

static inline int get_num_brps(void)

{

	return csr_read64(LOONGARCH_CSR_FWPC) & CSR_FWPC_NUM;

	return csr_read32(LOONGARCH_CSR_FWPC) & CSR_FWPC_NUM;

}



/* Determine number of WRP registers available. */

static inline int get_num_wrps(void)

{

	return csr_read64(LOONGARCH_CSR_MWPC) & CSR_MWPC_NUM;

	return csr_read32(LOONGARCH_CSR_MWPC) & CSR_MWPC_NUM;

}



#endif	/* __KERNEL__ */

arch/loongarch/include/asm/io.h

+4 −1
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
#include <asm/pgtable-bits.h>

#include <asm/string.h>



extern void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size);

extern void __init __iomem *early_ioremap(phys_addr_t phys_addr, unsigned long size);

extern void __init early_iounmap(void __iomem *addr, unsigned long size);



#define early_memremap early_ioremap
@@ -25,6 +25,9 @@ extern void __init early_iounmap(void __iomem *addr, unsigned long size); 
static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,

					 pgprot_t prot)

{

	if (offset > TO_PHYS_MASK)

		return NULL;



	switch (pgprot_val(prot) & _CACHE_MASK) {

	case _CACHE_CC:

		return (void __iomem *)(unsigned long)(CACHE_BASE + offset);

arch/loongarch/include/asm/loongarch.h

+2 −0
Original line number Diff line number Diff line
@@ -128,6 +128,7 @@ 
#define  CPUCFG6_PMNUM			GENMASK(7, 4)

#define  CPUCFG6_PMNUM_SHIFT		4

#define  CPUCFG6_PMBITS			GENMASK(13, 8)

#define  CPUCFG6_PMBITS_SHIFT		8

#define  CPUCFG6_UPM			BIT(14)



#define LOONGARCH_CPUCFG16		0x10
@@ -1137,6 +1138,7 @@ 
#define  IOCSRF_FLATMODE		BIT_ULL(10)

#define  IOCSRF_VM			BIT_ULL(11)

#define  IOCSRF_AVEC			BIT_ULL(15)

#define  IOCSRF_REDIRECT		BIT_ULL(16)



#define LOONGARCH_IOCSR_VENDOR		0x10