Commit e92ef446 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/cx0: Get rid of XELPDP_MSGBUS_TIMEOUT_FAST_US 



XELPDP_MSGBUS_TIMEOUT_FAST_US looks to be just an obfuscated version
of the default 2 microsecond fast timeout used by
intel_wait_for_register(). Get rid of it to make it clear what's going
on here.

Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251106152049.21115-6-ville.syrjala@linux.intel.com
parent 50101556

drivers/gpu/drm/i915/display/intel_cx0_phy.c

+1 −2
Original line number Diff line number Diff line
@@ -168,8 +168,7 @@ int intel_cx0_wait_for_ack(struct intel_encoder *encoder, 
				 XELPDP_PORT_P2M_MSGBUS_STATUS(display, port, lane),

				 XELPDP_PORT_P2M_RESPONSE_READY,

				 XELPDP_PORT_P2M_RESPONSE_READY,

				 XELPDP_MSGBUS_TIMEOUT_FAST_US,

				 XELPDP_MSGBUS_TIMEOUT_SLOW, val)) {

				 2, XELPDP_MSGBUS_TIMEOUT_SLOW, val)) {

		drm_dbg_kms(display->drm,

			    "PHY %c Timeout waiting for message ACK. Status: 0x%x\n",

			    phy_name(phy), *val);

drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h

+0 −1
Original line number Diff line number Diff line
@@ -75,7 +75,6 @@ 
#define   XELPDP_PORT_P2M_ERROR_SET			REG_BIT(15)



#define XELPDP_MSGBUS_TIMEOUT_SLOW			1

#define XELPDP_MSGBUS_TIMEOUT_FAST_US			2

#define XELPDP_PCLK_PLL_ENABLE_TIMEOUT_US		3200

#define XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US		20

#define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US		100