Commit e932f477 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: update mmhub 3.3 client id mappings 



Update the client id mapping so the correct clients
get printed when there is a mmhub page fault.

v2: fix typos spotted by David Wu.
v3: fix additional typo spotted by David.

Reviewed-by: default avatarDavid (Ming Qiang) Wu <David.Wu3@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2a2681ed

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

+104 −1
Original line number Diff line number Diff line
@@ -40,30 +40,129 @@ 


static const char *mmhub_client_ids_v3_3[][2] = {

	[0][0] = "VMC",

	[1][0] = "ISPXT",

	[2][0] = "ISPIXT",

	[4][0] = "DCEDMC",

	[6][0] = "MP0",

	[7][0] = "MP1",

	[8][0] = "MPM",

	[9][0] = "ISPPDPRD",

	[10][0] = "ISPCSTATRD",

	[11][0] = "ISPBYRPRD",

	[12][0] = "ISPRGBPRD",

	[13][0] = "ISPMCFPRD",

	[14][0] = "ISPMCFPRD1",

	[15][0] = "ISPYUVPRD",

	[16][0] = "ISPMCSCRD",

	[17][0] = "ISPGDCRD",

	[18][0] = "ISPLMERD",

	[22][0] = "ISPXT1",

	[23][0] = "ISPIXT1",

	[24][0] = "HDP",

	[25][0] = "LSDMA",

	[26][0] = "JPEG",

	[27][0] = "VPE",

	[28][0] = "VSCH",

	[29][0] = "VCNU",

	[30][0] = "VCN",

	[1][1] = "ISPXT",

	[2][1] = "ISPIXT",

	[3][1] = "DCEDWB",

	[4][1] = "DCEDMC",

	[5][1] = "ISPCSISWR",

	[6][1] = "MP0",

	[7][1] = "MP1",

	[8][1] = "MPM",

	[9][1] = "ISPPDPWR",

	[10][1] = "ISPCSTATWR",

	[11][1] = "ISPBYRPWR",

	[12][1] = "ISPRGBPWR",

	[13][1] = "ISPMCFPWR",

	[14][1] = "ISPMWR0",

	[15][1] = "ISPYUVPWR",

	[16][1] = "ISPMCSCWR",

	[17][1] = "ISPGDCWR",

	[18][1] = "ISPLMEWR",

	[20][1] = "ISPMWR2",

	[21][1] = "OSSSYS",

	[22][1] = "ISPXT1",

	[23][1] = "ISPIXT1",

	[24][1] = "HDP",

	[25][1] = "LSDMA",

	[26][1] = "JPEG",

	[27][1] = "VPE",

	[28][1] = "VSCH",

	[29][1] = "VCNU",

	[30][1] = "VCN",

};



static const char *mmhub_client_ids_v3_3_1[][2] = {

	[0][0] = "VMC",

	[4][0] = "DCEDMC",

	[6][0] = "MP0",

	[7][0] = "MP1",

	[8][0] = "MPM",

	[24][0] = "HDP",

	[25][0] = "LSDMA",

	[26][0] = "JPEG0",

	[27][0] = "VPE0",

	[28][0] = "VSCH",

	[29][0] = "VCNU0",

	[30][0] = "VCN0",

	[32+1][0] = "ISPXT",

	[32+2][0] = "ISPIXT",

	[32+9][0] = "ISPPDPRD",

	[32+10][0] = "ISPCSTATRD",

	[32+11][0] = "ISPBYRPRD",

	[32+12][0] = "ISPRGBPRD",

	[32+13][0] = "ISPMCFPRD",

	[32+14][0] = "ISPMCFPRD1",

	[32+15][0] = "ISPYUVPRD",

	[32+16][0] = "ISPMCSCRD",

	[32+17][0] = "ISPGDCRD",

	[32+18][0] = "ISPLMERD",

	[32+22][0] = "ISPXT1",

	[32+23][0] = "ISPIXT1",

	[32+26][0] = "JPEG1",

	[32+27][0] = "VPE1",

	[32+29][0] = "VCNU1",

	[32+30][0] = "VCN1",

	[3][1] = "DCEDWB",

	[4][1] = "DCEDMC",

	[6][1] = "MP0",

	[7][1] = "MP1",

	[8][1] = "MPM",

	[21][1] = "OSSSYS",

	[24][1] = "HDP",

	[25][1] = "LSDMA",

	[26][1] = "JPEG0",

	[27][1] = "VPE0",

	[28][1] = "VSCH",

	[29][1] = "VCNU0",

	[30][1] = "VCN0",

	[32+1][1] = "ISPXT",

	[32+2][1] = "ISPIXT",

	[32+5][1] = "ISPCSISWR",

	[32+9][1] = "ISPPDPWR",

	[32+10][1] = "ISPCSTATWR",

	[32+11][1] = "ISPBYRPWR",

	[32+12][1] = "ISPRGBPWR",

	[32+13][1] = "ISPMCFPWR",

	[32+14][1] = "ISPMWR0",

	[32+15][1] = "ISPYUVPWR",

	[32+16][1] = "ISPMCSCWR",

	[32+17][1] = "ISPGDCWR",

	[32+18][1] = "ISPLMEWR",

	[32+19][1] = "ISPMWR1",

	[32+20][1] = "ISPMWR2",

	[32+22][1] = "ISPXT1",

	[32+23][1] = "ISPIXT1",

	[32+26][1] = "JPEG1",

	[32+27][1] = "VPE1",

	[32+29][1] = "VCNU1",

	[32+30][1] = "VCN1",

};



static uint32_t mmhub_v3_3_get_invalidate_req(unsigned int vmid,

						uint32_t flush_type)

{
@@ -102,12 +201,16 @@ mmhub_v3_3_print_l2_protection_fault_status(struct amdgpu_device *adev, 


	switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) {

	case IP_VERSION(3, 3, 0):

	case IP_VERSION(3, 3, 1):

	case IP_VERSION(3, 3, 2):

		mmhub_cid = cid < ARRAY_SIZE(mmhub_client_ids_v3_3) ?

			    mmhub_client_ids_v3_3[cid][rw] :

			    cid == 0x140 ? "UMSCH" : NULL;

		break;

	case IP_VERSION(3, 3, 1):

		mmhub_cid = cid < ARRAY_SIZE(mmhub_client_ids_v3_3_1) ?

			    mmhub_client_ids_v3_3_1[cid][rw] :

			    cid == 0x140 ? "UMSCH" : NULL;

		break;

	default:

		mmhub_cid = NULL;

		break;