Merge branch '20240606-topic-rb1_gpu-v4-1-4bc0c19da4af@linaro.org' into clk-for-6.11

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,qcm2290-gpucc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Graphics Clock & Reset Controller on QCM2290

maintainers:

  - Konrad Dybcio <konradybcio@kernel.org>

description: |

  Qualcomm graphics clock control module provides the clocks, resets and power

  domains on Qualcomm SoCs.

  See also::

    include/dt-bindings/clock/qcom,qcm2290-gpucc.h

properties:

  compatible:

    const: qcom,qcm2290-gpucc

  reg:

    maxItems: 1

  clocks:

    items:

      - description: AHB interface clock,

      - description: SoC CXO clock

      - description: GPLL0 main branch source

      - description: GPLL0 div branch source

  power-domains:

    description:

      A phandle and PM domain specifier for the CX power domain.

    maxItems: 1

  required-opps:

    description:

      A phandle to an OPP node describing required CX performance point.

    maxItems: 1

required:

  - compatible

  - clocks

  - power-domains

allOf:

  - $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-qcm2290.h>

    #include <dt-bindings/clock/qcom,rpmcc.h>

    #include <dt-bindings/power/qcom-rpmpd.h>

    soc {

        #address-cells = <2>;

        #size-cells = <2>;

        clock-controller@5990000 {

            compatible = "qcom,qcm2290-gpucc";

            reg = <0x0 0x05990000 0x0 0x9000>;

            clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,

                     <&rpmcc RPM_SMD_XO_CLK_SRC>,

                     <&gcc GCC_GPU_GPLL0_CLK_SRC>,

                     <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;

            power-domains = <&rpmpd QCM2290_VDDCX>;

            required-opps = <&rpmpd_opp_low_svs>;

            #clock-cells = <1>;

            #reset-cells = <1>;

            #power-domain-cells = <1>;

        };

    };

...

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

/*

 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2024, Linaro Limited

 */

#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_QCM2290_H

#define _DT_BINDINGS_CLK_QCOM_GPU_CC_QCM2290_H

/* GPU_CC clocks */

#define GPU_CC_AHB_CLK			0

#define GPU_CC_CRC_AHB_CLK		1

#define GPU_CC_CX_GFX3D_CLK		2

#define GPU_CC_CX_GMU_CLK		3

#define GPU_CC_CX_SNOC_DVM_CLK		4

#define GPU_CC_CXO_AON_CLK		5

#define GPU_CC_CXO_CLK			6

#define GPU_CC_GMU_CLK_SRC		7

#define GPU_CC_GX_GFX3D_CLK		8

#define GPU_CC_GX_GFX3D_CLK_SRC		9

#define GPU_CC_PLL0			10

#define GPU_CC_SLEEP_CLK		11

#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK	12

/* Resets */

#define GPU_GX_BCR			0

/* GDSCs */

#define GPU_CX_GDSC			0

#define GPU_GX_GDSC			1

#endif