Commit eab6ba2a authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo
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arm64: dts: imx8mp: correct sdhc ipg clk 



The ipg clk for sdhc sources from IPG_CLK_ROOT per i.MX 8M Plus
Applications Processor Reference Manual, Table 5-2. System Clocks.

Fixes: 6d9b8d20 ("arm64: dts: freescale: Add i.MX8MP dtsi support")
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 734bf13e

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -1261,7 +1261,7 @@ usdhc1: mmc@30b40000 { 
				compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";

				reg = <0x30b40000 0x10000>;

				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MP_CLK_DUMMY>,

				clocks = <&clk IMX8MP_CLK_IPG_ROOT>,

					 <&clk IMX8MP_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MP_CLK_USDHC1_ROOT>;

				clock-names = "ipg", "ahb", "per";
@@ -1275,7 +1275,7 @@ usdhc2: mmc@30b50000 { 
				compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";

				reg = <0x30b50000 0x10000>;

				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MP_CLK_DUMMY>,

				clocks = <&clk IMX8MP_CLK_IPG_ROOT>,

					 <&clk IMX8MP_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MP_CLK_USDHC2_ROOT>;

				clock-names = "ipg", "ahb", "per";
@@ -1289,7 +1289,7 @@ usdhc3: mmc@30b60000 { 
				compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";

				reg = <0x30b60000 0x10000>;

				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MP_CLK_DUMMY>,

				clocks = <&clk IMX8MP_CLK_IPG_ROOT>,

					 <&clk IMX8MP_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MP_CLK_USDHC3_ROOT>;

				clock-names = "ipg", "ahb", "per";