Commit eacc77a7 authored by Vlad Dogaru's avatar Vlad Dogaru Committed by Jakub Kicinski
Browse files

net/mlx5e: Use custom tunnel header for vxlan gbp 



Symbolic (e.g. "vxlan") and custom (e.g. "tunnel_header_0") tunnels
cannot be combined, but the match params interface does not have fields
for matching on vxlan gbp. To match vxlan bgp, the tc_tun layer uses
tunnel_header_0.

Allow matching on both VNI and GBP by matching the VNI with a custom
tunnel header instead of the symbolic field name.

Matching solely on the VNI continues to use the symbolic field name.

Fixes: 74a778b4 ("net/mlx5: HWS, added definers handling")
Signed-off-by: default avatarVlad Dogaru <vdogaru@nvidia.com>
Reviewed-by: default avatarYevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: default avatarMark Bloch <mbloch@nvidia.com>
Reviewed-by: default avatarMichal Swiatkowski <michal.swiatkowski@linux.intel.com>
Link: https://patch.msgid.link/20250423083611.324567-2-mbloch@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent bf20af07

drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c

+29 −3
Original line number Diff line number Diff line
@@ -165,9 +165,6 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, 
	struct flow_match_enc_keyid enc_keyid;

	void *misc_c, *misc_v;



	misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);

	misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);



	if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID))

		return 0;
@@ -182,6 +179,30 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, 
		err = mlx5e_tc_tun_parse_vxlan_gbp_option(priv, spec, f);

		if (err)

			return err;



		/* We can't mix custom tunnel headers with symbolic ones and we

		 * don't have a symbolic field name for GBP, so we use custom

		 * tunnel headers in this case. We need hardware support to

		 * match on custom tunnel headers, but we already know it's

		 * supported because the previous call successfully checked for

		 * that.

		 */

		misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,

				      misc_parameters_5);

		misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,

				      misc_parameters_5);



		/* Shift by 8 to account for the reserved bits in the vxlan

		 * header after the VNI.

		 */

		MLX5_SET(fte_match_set_misc5, misc_c, tunnel_header_1,

			 be32_to_cpu(enc_keyid.mask->keyid) << 8);

		MLX5_SET(fte_match_set_misc5, misc_v, tunnel_header_1,

			 be32_to_cpu(enc_keyid.key->keyid) << 8);



		spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_5;



		return 0;

	}



	/* match on VNI is required */
@@ -195,6 +216,11 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, 
		return -EOPNOTSUPP;

	}



	misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,

			      misc_parameters);

	misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,

			      misc_parameters);



	MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,

		 be32_to_cpu(enc_keyid.mask->keyid));

	MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,