Commit eb16ddb8 authored by Biju Das's avatar Biju Das Committed by Stephen Boyd
Browse files

clk: versaclock3: Update vc3_get_div() to avoid divide by zero 



Update vc3_get_div() to avoid divide by zero operation on
vc3_div_round_rate() by returning1, if there is no table match
found.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20231122142310.203169-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent b85ea95d

drivers/clk/clk-versaclock3.c

+1 −1
Original line number Diff line number Diff line
@@ -477,7 +477,7 @@ static unsigned int vc3_get_div(const struct clk_div_table *table, 
		if (clkt->val == val)

			return clkt->div;



	return 0;

	return 1;

}



static unsigned long vc3_div_recalc_rate(struct clk_hw *hw,