Commit ebe7561e authored by Cosmin Tanislav's avatar Cosmin Tanislav Committed by Geert Uytterhoeven
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pinctrl: renesas: rzt2h: Fix invalid wait context 



The rzt2h_gpio_get_direction() function is called from
gpiod_get_direction(), which ends up being used within the __setup_irq()
call stack when requesting an interrupt.

__setup_irq() holds a raw_spinlock_t with IRQs disabled, which creates
an atomic context. spinlock_t cannot be used within atomic context
when PREEMPT_RT is enabled, since it may become a sleeping lock.

An "[ BUG: Invalid wait context ]" splat is observed when running with
CONFIG_PROVE_LOCKING enabled, describing exactly the aforementioned call
stack.

__setup_irq() needs to hold a raw_spinlock_t with IRQs disabled to
serialize access against a concurrent hard interrupt.

Switch to raw_spinlock_t to fix this.

Fixes: 829dde33 ("pinctrl: renesas: rzt2h: Add GPIO IRQ chip to handle interrupts")
Signed-off-by: default avatarCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260205103930.666051-1-cosmin-gabriel.tanislav.xa@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent e825c79e

drivers/pinctrl/renesas/pinctrl-rzt2h.c

+7 −7
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ struct rzt2h_pinctrl { 
	struct gpio_chip		gpio_chip;

	struct pinctrl_gpio_range	gpio_range;

	DECLARE_BITMAP(used_irqs, RZT2H_INTERRUPTS_NUM);

	spinlock_t			lock; /* lock read/write registers */

	raw_spinlock_t			lock; /* lock read/write registers */

	struct mutex			mutex; /* serialize adding groups and functions */

	bool				safety_port_enabled;

	atomic_t			wakeup_path;
@@ -145,7 +145,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl, 
	u64 reg64;

	u16 reg16;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	/* Set pin to 'Non-use (Hi-Z input protection)'  */

	reg16 = rzt2h_pinctrl_readw(pctrl, port, PM(port));
@@ -474,7 +474,7 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset) 
	if (ret)

		return ret;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	/* Select GPIO mode in PMC Register */

	rzt2h_pinctrl_set_gpio_en(pctrl, port, bit, true);
@@ -487,7 +487,7 @@ static void rzt2h_gpio_set_direction(struct rzt2h_pinctrl *pctrl, u32 port, 
{

	u16 reg;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	reg = rzt2h_pinctrl_readw(pctrl, port, PM(port));

	reg &= ~PM_PIN_MASK(bit);
@@ -509,7 +509,7 @@ static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 
	if (ret)

		return ret;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	if (rzt2h_pinctrl_readb(pctrl, port, PMC(port)) & BIT(bit)) {

		/*
@@ -547,7 +547,7 @@ static int rzt2h_gpio_set(struct gpio_chip *chip, unsigned int offset, 
	u8 bit = RZT2H_PIN_ID_TO_PIN(offset);

	u8 reg;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	reg = rzt2h_pinctrl_readb(pctrl, port, P(port));

	if (value)
@@ -965,7 +965,7 @@ static int rzt2h_pinctrl_probe(struct platform_device *pdev) 
	if (ret)

		return ret;



	spin_lock_init(&pctrl->lock);

	raw_spin_lock_init(&pctrl->lock);

	mutex_init(&pctrl->mutex);

	platform_set_drvdata(pdev, pctrl);