Commit ec2cb52f authored by Tim Harvey's avatar Tim Harvey Committed by Shawn Guo
Browse files

arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS 



The GW71xx does not have a gpio controlled vbus regulator but it does
require some pinctrl. Remove the regulator and move the valid pinctrl
into the usbotg1 node.

Fixes: bd306fdb ("arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS")
Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 15ae00dd

arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi

+9 −20
Original line number Diff line number Diff line
@@ -47,17 +47,6 @@ pps { 
		gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;

		status = "okay";

	};



	reg_usb_otg1_vbus: regulator-usb-otg1 {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_usb1_en>;

		compatible = "regulator-fixed";

		regulator-name = "usb_otg1_vbus";

		gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

	};

};



/* off-board header */
@@ -144,9 +133,10 @@ &uart3 { 
};



&usbotg1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usbotg1>;

	dr_mode = "otg";

	over-current-active-low;

	vbus-supply = <&reg_usb_otg1_vbus>;

	status = "okay";

};
@@ -204,14 +194,6 @@ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41 
		>;

	};



	pinctrl_reg_usb1_en: regusb1grp {

		fsl,pins = <

			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x41

			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x141

			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x41

		>;

	};



	pinctrl_spi2: spi2grp {

		fsl,pins = <

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
@@ -234,4 +216,11 @@ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 
			MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX	0x140

		>;

	};



	pinctrl_usbotg1: usbotg1grp {

		fsl,pins = <

			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x141

			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x41

		>;

	};

};