Commit ec5eb438 authored by Stanley Chang's avatar Stanley Chang Committed by Greg Kroah-Hartman
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usb: dwc3: core: add support for realtek SoCs custom's global register start address 



The Realtek RTD SoCs were designed with the global register address
offset at 0x8100. The default address offset is constant at
DWC3_GLOBALS_REGS_START (0xc100). Therefore, add a check if the
compatible name of the parent is realtek,rtd-dwc3, then global
register start address will remap to 0x8100.

Signed-off-by: default avatarStanley Chang <stanley_chang@realtek.com>
Acked-by: default avatarThinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/20230505025104.18321-1-stanley_chang@realtek.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1c024241

drivers/usb/dwc3/core.c

+11 −0
Original line number Diff line number Diff line
@@ -1800,6 +1800,17 @@ static int dwc3_probe(struct platform_device *pdev) 
	dwc_res = *res;

	dwc_res.start += DWC3_GLOBALS_REGS_START;



	if (dev->of_node) {

		struct device_node *parent = of_get_parent(dev->of_node);



		if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) {

			dwc_res.start -= DWC3_GLOBALS_REGS_START;

			dwc_res.start += DWC3_RTK_RTD_GLOBALS_REGS_START;

		}



		of_node_put(parent);

	}



	regs = devm_ioremap_resource(dev, &dwc_res);

	if (IS_ERR(regs))

		return PTR_ERR(regs);

drivers/usb/dwc3/core.h

+2 −0
Original line number Diff line number Diff line
@@ -84,6 +84,8 @@ 
#define DWC3_OTG_REGS_START		0xcc00

#define DWC3_OTG_REGS_END		0xccff



#define DWC3_RTK_RTD_GLOBALS_REGS_START	0x8100



/* Global Registers */

#define DWC3_GSBUSCFG0		0xc100

#define DWC3_GSBUSCFG1		0xc104