Commit ec8f353f authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'x86/fpu' into x86/core, to merge dependent commits 

Prepare to resolve conflicts with an upstream series of fixes that conflict
with pending x86 changes:

  6f5bf947 Merge tag 'its-for-linus-20250509' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 2fb8414e 32d5fa80

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -481,6 +481,7 @@ 
#define X86_FEATURE_AMD_HTR_CORES	(21*32+ 6) /* Heterogeneous Core Topology */

#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32+ 7) /* Workload Classification */

#define X86_FEATURE_PREFER_YMM		(21*32+ 8) /* Avoid ZMM registers due to downclocking */

#define X86_FEATURE_APX			(21*32+ 9) /* Advanced Performance Extensions */



/*

 * BUG word(s)

arch/x86/include/asm/entry-common.h

+3 −2
Original line number Diff line number Diff line
@@ -53,7 +53,6 @@ static inline void arch_exit_work(unsigned long ti_work) 
	if (unlikely(ti_work & _TIF_IO_BITMAP))

		tss_update_io_bitmap();



	fpregs_assert_state_consistent();

	if (unlikely(ti_work & _TIF_NEED_FPU_LOAD))

		switch_fpu_return();

}
@@ -61,7 +60,9 @@ static inline void arch_exit_work(unsigned long ti_work) 
static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,

						  unsigned long ti_work)

{

	if (IS_ENABLED(CONFIG_X86_DEBUG_FPU) || unlikely(ti_work))

	fpregs_assert_state_consistent();



	if (unlikely(ti_work))

		arch_exit_work(ti_work);



	fred_update_rsp0();

arch/x86/include/asm/fpu/api.h

+1 −1
Original line number Diff line number Diff line
@@ -136,7 +136,7 @@ static inline void fpstate_free(struct fpu *fpu) { } 
#endif



/* fpstate-related functions which are exported to KVM */

extern void fpstate_clear_xstate_component(struct fpstate *fps, unsigned int xfeature);

extern void fpstate_clear_xstate_component(struct fpstate *fpstate, unsigned int xfeature);



extern u64 xstate_get_guest_group_perm(void);

arch/x86/include/asm/fpu/sched.h

+11 −27
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ 
#include <asm/trace/fpu.h>



extern void save_fpregs_to_fpstate(struct fpu *fpu);

extern void fpu__drop(struct fpu *fpu);

extern void fpu__drop(struct task_struct *tsk);

extern int  fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal,

		      unsigned long shstk_addr);

extern void fpu_flush_thread(void);
@@ -18,31 +18,25 @@ extern void fpu_flush_thread(void); 
/*

 * FPU state switching for scheduling.

 *

 * This is a two-stage process:

 * switch_fpu() saves the old state and sets TIF_NEED_FPU_LOAD if

 * TIF_NEED_FPU_LOAD is not set.  This is done within the context

 * of the old process.

 *

 *  - switch_fpu_prepare() saves the old state.

 *    This is done within the context of the old process.

 *

 *  - switch_fpu_finish() sets TIF_NEED_FPU_LOAD; the floating point state

 *    will get loaded on return to userspace, or when the kernel needs it.

 *

 * If TIF_NEED_FPU_LOAD is cleared then the CPU's FPU registers

 * are saved in the current thread's FPU register state.

 *

 * If TIF_NEED_FPU_LOAD is set then CPU's FPU registers may not

 * hold current()'s FPU registers. It is required to load the

 * Once TIF_NEED_FPU_LOAD is set, it is required to load the

 * registers before returning to userland or using the content

 * otherwise.

 *

 * The FPU context is only stored/restored for a user task and

 * PF_KTHREAD is used to distinguish between kernel and user threads.

 */

static inline void switch_fpu_prepare(struct task_struct *old, int cpu)

static inline void switch_fpu(struct task_struct *old, int cpu)

{

	if (cpu_feature_enabled(X86_FEATURE_FPU) &&

	if (!test_tsk_thread_flag(old, TIF_NEED_FPU_LOAD) &&

	    cpu_feature_enabled(X86_FEATURE_FPU) &&

	    !(old->flags & (PF_KTHREAD | PF_USER_WORKER))) {

		struct fpu *old_fpu = &old->thread.fpu;

		struct fpu *old_fpu = x86_task_fpu(old);



		set_tsk_thread_flag(old, TIF_NEED_FPU_LOAD);

		save_fpregs_to_fpstate(old_fpu);

		/*

		 * The save operation preserved register state, so the
@@ -50,7 +44,7 @@ static inline void switch_fpu_prepare(struct task_struct *old, int cpu) 
		 * current CPU number in @old_fpu, so the next return

		 * to user space can avoid the FPU register restore

		 * when is returns on the same CPU and still owns the

		 * context.

		 * context. See fpregs_restore_userregs().

		 */

		old_fpu->last_cpu = cpu;
@@ -58,14 +52,4 @@ static inline void switch_fpu_prepare(struct task_struct *old, int cpu) 
	}

}



/*

 * Delay loading of the complete FPU state until the return to userland.

 * PKRU is handled separately.

 */

static inline void switch_fpu_finish(struct task_struct *new)

{

	if (cpu_feature_enabled(X86_FEATURE_FPU))

		set_tsk_thread_flag(new, TIF_NEED_FPU_LOAD);

}



#endif /* _ASM_X86_FPU_SCHED_H */

arch/x86/include/asm/fpu/types.h

+14 −10
Original line number Diff line number Diff line
@@ -125,6 +125,7 @@ enum xfeature { 
	XFEATURE_RSRVD_COMP_16,

	XFEATURE_XTILE_CFG,

	XFEATURE_XTILE_DATA,

	XFEATURE_APX,



	XFEATURE_MAX,

};
@@ -145,6 +146,7 @@ enum xfeature { 
#define XFEATURE_MASK_LBR		(1 << XFEATURE_LBR)

#define XFEATURE_MASK_XTILE_CFG		(1 << XFEATURE_XTILE_CFG)

#define XFEATURE_MASK_XTILE_DATA	(1 << XFEATURE_XTILE_DATA)

#define XFEATURE_MASK_APX		(1 << XFEATURE_APX)



#define XFEATURE_MASK_FPSSE		(XFEATURE_MASK_FP | XFEATURE_MASK_SSE)

#define XFEATURE_MASK_AVX512		(XFEATURE_MASK_OPMASK \
@@ -303,6 +305,13 @@ struct xtile_data { 
	struct reg_1024_byte		tmm;

} __packed;



/*

 * State component 19: 8B extended general purpose register.

 */

struct apx_state {

	u64				egpr[16];

} __packed;



/*

 * State component 10 is supervisor state used for context-switching the

 * PASID state.
@@ -407,9 +416,11 @@ struct fpu_state_perm { 
	/*

	 * @__state_perm:

	 *

	 * This bitmap indicates the permission for state components, which

	 * are available to a thread group. The permission prctl() sets the

	 * enabled state bits in thread_group_leader()->thread.fpu.

	 * This bitmap indicates the permission for state components

	 * available to a thread group, including both user and supervisor

	 * components and software-defined bits like FPU_GUEST_PERM_LOCKED.

	 * The permission prctl() sets the enabled state bits in

	 * thread_group_leader()->thread.fpu.

	 *

	 * All run time operations use the per thread information in the

	 * currently active fpu.fpstate which contains the xfeature masks
@@ -524,13 +535,6 @@ struct fpu_guest { 
	 */

	u64				xfeatures;



	/*

	 * @perm:			xfeature bitmap of features which are

	 *				permitted to be enabled for the guest

	 *				vCPU.

	 */

	u64				perm;



	/*

	 * @xfd_err:			Save the guest value.

	 */