Unverified Commit ed2232d4 authored by Syed Saba Kareem's avatar Syed Saba Kareem Committed by Mark Brown
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ASoC: amd: acp: fix for i2s mode register field update



I2S mode register field will be set to 1 when tdm mode is enabled.
Update the I2S mode field based on tdm_mode flag check.

This will fix below smatch checker warning.

sound/soc/amd/acp/acp-i2s.c:59 acp_set_i2s_clk()
	warn: odd binop '0x0 & 0x2'

Fixes: 40f74d5f ("ASoC: amd: acp: refactor acp i2s clock
	generation code")

Reported-By: default avatarDan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: default avatarSyed Saba Kareem <Syed.SabaKareem@amd.com>
Link: https://lore.kernel.org/r/20231031135949.1064581-3-Syed.SabaKareem@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent cba45900
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+2 −2
Original line number Diff line number Diff line
@@ -26,7 +26,6 @@

#define DRV_NAME "acp_i2s_playcap"
#define	I2S_MASTER_MODE_ENABLE		1
#define	I2S_MODE_ENABLE			0
#define	LRCLK_DIV_FIELD			GENMASK(10, 2)
#define	BCLK_DIV_FIELD			GENMASK(23, 11)
#define	ACP63_LRCLK_DIV_FIELD		GENMASK(12, 2)
@@ -56,7 +55,8 @@ static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id)
	}

	val  = I2S_MASTER_MODE_ENABLE;
	val |= I2S_MODE_ENABLE & BIT(1);
	if (adata->tdm_mode)
		val |= BIT(1);

	switch (chip->acp_rev) {
	case ACP63_DEV: