Commit ed3b7353 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: enable psp support for vangogh 



This patch is to enable psp support for vangogh

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5120cb54

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+1 −0
Original line number Diff line number Diff line
@@ -100,6 +100,7 @@ static int psp_early_init(void *handle) 
	case CHIP_NAVI12:

	case CHIP_SIENNA_CICHLID:

	case CHIP_NAVY_FLOUNDER:

	case CHIP_VANGOGH:

		psp_v11_0_set_psp_funcs(psp);

		psp->autoload_supported = true;

		break;

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

+1 −2
Original line number Diff line number Diff line
@@ -391,12 +391,11 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type) 
	case CHIP_NAVI12:

	case CHIP_SIENNA_CICHLID:

	case CHIP_NAVY_FLOUNDER:

	case CHIP_VANGOGH:

		if (!load_type)

			return AMDGPU_FW_LOAD_DIRECT;

		else

			return AMDGPU_FW_LOAD_PSP;

	case CHIP_VANGOGH:

		return AMDGPU_FW_LOAD_DIRECT;

	default:

		DRM_ERROR("Unknown firmware load type\n");

	}

drivers/gpu/drm/amd/amdgpu/nv.c

+2 −0
Original line number Diff line number Diff line
@@ -609,6 +609,8 @@ int nv_set_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_device_ip_block_add(adev, &nv_common_ip_block);

		amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block);

		amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);

		if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))

			amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);

		amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);

		if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))

			amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

+5 −0
Original line number Diff line number Diff line
@@ -59,6 +59,8 @@ MODULE_FIRMWARE("amdgpu/sienna_cichlid_sos.bin"); 
MODULE_FIRMWARE("amdgpu/sienna_cichlid_ta.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_sos.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_ta.bin");

MODULE_FIRMWARE("amdgpu/vangogh_asd.bin");

MODULE_FIRMWARE("amdgpu/vangogh_toc.bin");



/* address block */

#define smnMP1_FIRMWARE_FLAGS		0x3010024
@@ -105,6 +107,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) 
	case CHIP_NAVY_FLOUNDER:

		chip_name = "navy_flounder";

		break;

	case CHIP_VANGOGH:

		chip_name = "vangogh";

		break;

	default:

		BUG();

	}