Commit ed44935c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-fix-v6.9-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi fixes from Mark Brown:
 "Two device specific fixes here, one avoiding glitches on chip select
  with the STM32 driver and one for incorrectly configured clocks on the
  Microchip QSPI controller"

* tag 'spi-fix-v6.9-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: microchip-core-qspi: fix setting spi bus clock rate
  spi: stm32: enable controller before asserting CS
parents 99dff484 ef13561d

drivers/spi/spi-microchip-core-qspi.c

+1 −0
Original line number Diff line number Diff line
@@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi 
	}



	control = readl_relaxed(qspi->regs + REG_CONTROL);

	control &= ~CONTROL_CLKRATE_MASK;

	control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;

	writel_relaxed(control, qspi->regs + REG_CONTROL);

	control = readl_relaxed(qspi->regs + REG_CONTROL);

drivers/spi/spi-stm32.c

+2 −12
Original line number Diff line number Diff line
@@ -1016,10 +1016,8 @@ static irqreturn_t stm32fx_spi_irq_event(int irq, void *dev_id) 
static irqreturn_t stm32fx_spi_irq_thread(int irq, void *dev_id)

{

	struct spi_controller *ctrl = dev_id;

	struct stm32_spi *spi = spi_controller_get_devdata(ctrl);



	spi_finalize_current_transfer(ctrl);

	stm32fx_spi_disable(spi);



	return IRQ_HANDLED;

}
@@ -1187,6 +1185,8 @@ static int stm32_spi_prepare_msg(struct spi_controller *ctrl, 
			 ~clrb) | setb,

			spi->base + spi->cfg->regs->cpol.reg);



	stm32_spi_enable(spi);



	spin_unlock_irqrestore(&spi->lock, flags);



	return 0;
@@ -1204,7 +1204,6 @@ static void stm32fx_spi_dma_tx_cb(void *data) 


	if (spi->cur_comm == SPI_SIMPLEX_TX || spi->cur_comm == SPI_3WIRE_TX) {

		spi_finalize_current_transfer(spi->ctrl);

		stm32fx_spi_disable(spi);

	}

}
@@ -1219,7 +1218,6 @@ static void stm32_spi_dma_rx_cb(void *data) 
	struct stm32_spi *spi = data;



	spi_finalize_current_transfer(spi->ctrl);

	spi->cfg->disable(spi);

}



/**
@@ -1307,8 +1305,6 @@ static int stm32fx_spi_transfer_one_irq(struct stm32_spi *spi) 


	stm32_spi_set_bits(spi, STM32FX_SPI_CR2, cr2);



	stm32_spi_enable(spi);



	/* starting data transfer when buffer is loaded */

	if (spi->tx_buf)

		spi->cfg->write_tx(spi);
@@ -1345,8 +1341,6 @@ static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi) 


	spin_lock_irqsave(&spi->lock, flags);



	stm32_spi_enable(spi);



	/* Be sure to have data in fifo before starting data transfer */

	if (spi->tx_buf)

		stm32h7_spi_write_txfifo(spi);
@@ -1378,8 +1372,6 @@ static void stm32fx_spi_transfer_one_dma_start(struct stm32_spi *spi) 
		 */

		stm32_spi_set_bits(spi, STM32FX_SPI_CR2, STM32FX_SPI_CR2_ERRIE);

	}



	stm32_spi_enable(spi);

}



/**
@@ -1413,8 +1405,6 @@ static void stm32h7_spi_transfer_one_dma_start(struct stm32_spi *spi) 


	stm32_spi_set_bits(spi, STM32H7_SPI_IER, ier);



	stm32_spi_enable(spi);



	if (STM32_SPI_HOST_MODE(spi))

		stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART);

}