Commit edc8230a authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: move INTF tearing checks to dpu_encoder_phys_cmd_init 



As the INTF is fixed at the encoder creation time, we can move the
check whether INTF supports tearchck to dpu_encoder_phys_cmd_init().
This function can return an error if INTF doesn't have required feature.
Performing this check in dpu_encoder_phys_cmd_tearcheck_config() is less
useful, as this function returns void.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/555553/
Link: https://lore.kernel.org/r/20230904020454.2945667-9-dmitry.baryshkov@linaro.org
parent cae719b2

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+23 −16
Original line number Diff line number Diff line
@@ -327,23 +327,20 @@ static void dpu_encoder_phys_cmd_tearcheck_config( 
	unsigned long vsync_hz;

	struct dpu_kms *dpu_kms;



	if (phys_enc->has_intf_te) {

		if (!phys_enc->hw_intf ||

		    !phys_enc->hw_intf->ops.enable_tearcheck) {

			DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");

			return;

		}



		DPU_DEBUG_CMDENC(cmd_enc, "");

	} else {

		if (!phys_enc->hw_pp ||

		    !phys_enc->hw_pp->ops.enable_tearcheck) {

	/*

	 * TODO: if/when resource allocation is refactored, move this to a

	 * place where the driver can actually return an error.

	 */

	if (!phys_enc->has_intf_te &&

	    (!phys_enc->hw_pp ||

	     !phys_enc->hw_pp->ops.enable_tearcheck)) {

		DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");

		return;

	}



		DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);

	}

	DPU_DEBUG_CMDENC(cmd_enc, "intf %d pp %d\n",

			 phys_enc->hw_intf ? phys_enc->hw_intf->idx - INTF_0 : -1,

			 phys_enc->hw_pp ? phys_enc->hw_pp->idx - PINGPONG_0 : -1);



	mode = &phys_enc->cached_mode;
@@ -770,10 +767,20 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( 
	phys_enc->intf_mode = INTF_MODE_CMD;

	cmd_enc->stream_sel = 0;



	if (!phys_enc->hw_intf) {

		DPU_ERROR_CMDENC(cmd_enc, "no INTF provided\n");

		return ERR_PTR(-EINVAL);

	}



	/* DPU before 5.0 use PINGPONG for TE handling */

	if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5)

		phys_enc->has_intf_te = true;



	if (phys_enc->has_intf_te && !phys_enc->hw_intf->ops.enable_tearcheck) {

		DPU_ERROR_CMDENC(cmd_enc, "tearcheck not supported\n");

		return ERR_PTR(-EINVAL);

	}



	atomic_set(&cmd_enc->pending_vblank_cnt, 0);

	init_waitqueue_head(&cmd_enc->pending_vblank_wq);