Commit ede339ff authored by Yicong Yang's avatar Yicong Yang Committed by Will Deacon
Browse files

drivers/perf: hisi: Extend the field of tt_core



Currently the tt_core's using config1's bit [7, 0] and can not be
extended. For some platforms there's more the 8 CPUs sharing the
L3 cache. So make tt_core use config2's bit [15, 0] and the remaining
bits in config2 is reserved for extension.

Acked-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Signed-off-by: default avatarYushan Wang <wangyushan12@huawei.com>
Reviewed-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 2271f163
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -55,10 +55,10 @@
#define L3C_V1_NR_EVENTS	0x59
#define L3C_V2_NR_EVENTS	0xFF

HISI_PMU_EVENT_ATTR_EXTRACTOR(tt_core, config1, 7, 0);
HISI_PMU_EVENT_ATTR_EXTRACTOR(tt_req, config1, 10, 8);
HISI_PMU_EVENT_ATTR_EXTRACTOR(datasrc_cfg, config1, 15, 11);
HISI_PMU_EVENT_ATTR_EXTRACTOR(datasrc_skt, config1, 16, 16);
HISI_PMU_EVENT_ATTR_EXTRACTOR(tt_core, config2, 15, 0);

static void hisi_l3c_pmu_config_req_tracetag(struct perf_event *event)
{
@@ -397,7 +397,7 @@ static const struct attribute_group hisi_l3c_pmu_v1_format_group = {

static struct attribute *hisi_l3c_pmu_v2_format_attr[] = {
	HISI_PMU_FORMAT_ATTR(event, "config:0-7"),
	HISI_PMU_FORMAT_ATTR(tt_core, "config1:0-7"),
	HISI_PMU_FORMAT_ATTR(tt_core, "config2:0-15"),
	HISI_PMU_FORMAT_ATTR(tt_req, "config1:8-10"),
	HISI_PMU_FORMAT_ATTR(datasrc_cfg, "config1:11-15"),
	HISI_PMU_FORMAT_ATTR(datasrc_skt, "config1:16"),