Unverified Commit edea9277 authored by Olivier Moysan's avatar Olivier Moysan Committed by Mark Brown
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ASoC: stm32: sai: skip useless iterations on kernel rate loop 



the frequency of the kernel clock must be greater than or equal to the
bitclock rate. When searching for a convenient kernel clock rate in
stm32_sai_set_parent_rate() function, it is useless to continue the loop
below bitclock rate, as it will result in a invalid kernel clock rate.
Change the loop output condition.

Fixes: 2cfe1ff2 ("ASoC: stm32: sai: add stm32mp25 support")
Signed-off-by: default avatarOlivier Moysan <olivier.moysan@foss.st.com>
Link: https://patch.msgid.link/20250430165210.321273-2-olivier.moysan@foss.st.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b4432656

sound/soc/stm/stm32_sai_sub.c

+7 −4
Original line number Diff line number Diff line
@@ -409,11 +409,11 @@ static int stm32_sai_set_parent_rate(struct stm32_sai_sub_data *sai, 
				     unsigned int rate)

{

	struct platform_device *pdev = sai->pdev;

	unsigned int sai_ck_rate, sai_ck_max_rate, sai_curr_rate, sai_new_rate;

	unsigned int sai_ck_rate, sai_ck_max_rate, sai_ck_min_rate, sai_curr_rate, sai_new_rate;

	int div, ret;



	/*

	 * Set maximum expected kernel clock frequency

	 * Set minimum and maximum expected kernel clock frequency

	 * - mclk on or spdif:

	 *   f_sai_ck = MCKDIV * mclk-fs * fs

	 *   Here typical 256 ratio is assumed for mclk-fs
@@ -423,13 +423,16 @@ static int stm32_sai_set_parent_rate(struct stm32_sai_sub_data *sai, 
	 *   Set constraint MCKDIV * FRL <= 256, to ensure MCKDIV is in available range

	 *   f_sai_ck = sai_ck_max_rate * pow_of_two(FRL) / 256

	 */

	sai_ck_min_rate = rate * 256;

	if (!(rate % SAI_RATE_11K))

		sai_ck_max_rate = SAI_MAX_SAMPLE_RATE_11K * 256;

	else

		sai_ck_max_rate = SAI_MAX_SAMPLE_RATE_8K * 256;



	if (!sai->sai_mclk && !STM_SAI_PROTOCOL_IS_SPDIF(sai))

	if (!sai->sai_mclk && !STM_SAI_PROTOCOL_IS_SPDIF(sai)) {

		sai_ck_min_rate = rate * sai->fs_length;

		sai_ck_max_rate /= DIV_ROUND_CLOSEST(256, roundup_pow_of_two(sai->fs_length));

	}



	/*

	 * Request exclusivity, as the clock is shared by SAI sub-blocks and by
@@ -472,7 +475,7 @@ static int stm32_sai_set_parent_rate(struct stm32_sai_sub_data *sai, 
		/* Try a lower frequency */

		div++;

		sai_ck_rate = sai_ck_max_rate / div;

	} while (sai_ck_rate > rate);

	} while (sai_ck_rate >= sai_ck_min_rate);



	/* No accurate rate found */

	dev_err(&pdev->dev, "Failed to find an accurate rate");