Commit ee7a846e authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: Emit cleaner shader at end of IB submission



This commit introduces the emission of a cleaner shader at the end of
the IB submission process. This is achieved by adding a new function
pointer, `emit_cleaner_shader`, to the `amdgpu_ring_funcs` structure. If
the `emit_cleaner_shader` function is set in the ring functions, it is
called during the VM flush process.

The cleaner shader is only emitted if the `enable_cleaner_shader` flag
is set in the `amdgpu_device` structure. This allows the cleaner shader
emission to be controlled on a per-device basis.

By emitting a cleaner shader at the end of the IB submission, we can
ensure that the VM state is properly cleaned up after each submission.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Suggested-by: default avatarChristian König <christian.koenig@amd.com>
parent aec773a1
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+1 −0
Original line number Diff line number Diff line
@@ -236,6 +236,7 @@ struct amdgpu_ring_funcs {
	void (*patch_ce)(struct amdgpu_ring *ring, unsigned offset);
	void (*patch_de)(struct amdgpu_ring *ring, unsigned offset);
	int (*reset)(struct amdgpu_ring *ring, unsigned int vmid);
	void (*emit_cleaner_shader)(struct amdgpu_ring *ring);
};

struct amdgpu_ring {
+5 −0
Original line number Diff line number Diff line
@@ -681,6 +681,10 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
	pasid_mapping_needed &= adev->gmc.gmc_funcs->emit_pasid_mapping &&
		ring->funcs->emit_wreg;

	if (adev->gfx.enable_cleaner_shader &&
	    ring->funcs->emit_cleaner_shader)
		ring->funcs->emit_cleaner_shader(ring);

	if (!vm_flush_needed && !gds_switch_needed && !need_pipe_sync)
		return 0;

@@ -742,6 +746,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
		amdgpu_ring_emit_switch_buffer(ring);
		amdgpu_ring_emit_switch_buffer(ring);
	}

	amdgpu_ring_ib_end(ring);
	return 0;
}