Commit ee98fb71 authored by Zhigang Luo's avatar Zhigang Luo Committed by Alex Deucher
Browse files

drm/amdgpu: set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 



to avoid reading wrong WPTR from doorbell in sriov vf, set
CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 to read WPTR from MQD.

Signed-off-by: default avatarZhigang Luo <Zhigang.Luo@amd.com>
Acked-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9e4c9ee0

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

+3 −0
Original line number Diff line number Diff line
@@ -1613,6 +1613,9 @@ static int gfx_v9_4_3_xcc_mqd_init(struct amdgpu_ring *ring, int xcc_id) 
				    DOORBELL_SOURCE, 0);

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

				    DOORBELL_HIT, 0);

		if (amdgpu_sriov_vf(adev))

			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

					    DOORBELL_MODE, 1);

	} else {

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

					 DOORBELL_EN, 0);

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

+3 −0
Original line number Diff line number Diff line
@@ -546,6 +546,9 @@ static void init_mqd_hiq_v9_4_3(struct mqd_manager *mm, void **mqd, 
		m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |

					1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |

					1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;

		if (amdgpu_sriov_vf(mm->dev->adev))

			m->cp_hqd_pq_doorbell_control |= 1 <<

				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;

		m->cp_mqd_stride_size = kfd_hiq_mqd_stride(mm->dev);

		if (xcc == 0) {

			/* Set no_update_rptr = 0 in Master XCC */