Commit eeb93413 authored by Alexey Kardashevskiy's avatar Alexey Kardashevskiy Committed by Dan Williams
Browse files

iommu/amd: Report SEV-TIO support



The SEV-TIO switch in the AMD BIOS is reported to the OS via
the IOMMU Extended Feature 2 register (EFR2), bit 1.

Add helper to parse the bit and report the feature presence.

Signed-off-by: default avatarAlexey Kardashevskiy <aik@amd.com>
Link: https://patch.msgid.link/20251202024449.542361-4-aik@amd.com


Acked-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
Reviewed-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Acked-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent c3859de8
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+1 −0
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@


/* Extended Feature 2 Bits */
#define FEATURE_SEVSNPIO_SUP	BIT_ULL(1)
#define FEATURE_SNPAVICSUP	GENMASK_ULL(7, 5)
#define FEATURE_SNPAVICSUP_GAM(x) \
	(FIELD_GET(FEATURE_SNPAVICSUP, x) == 0x1)
+9 −0
Original line number Diff line number Diff line
@@ -2252,6 +2252,9 @@ static void print_iommu_info(void)
		if (check_feature(FEATURE_SNP))
			pr_cont(" SNP");

		if (check_feature2(FEATURE_SEVSNPIO_SUP))
			pr_cont(" SEV-TIO");

		pr_cont("\n");
	}

@@ -4015,4 +4018,10 @@ int amd_iommu_snp_disable(void)
	return 0;
}
EXPORT_SYMBOL_GPL(amd_iommu_snp_disable);

bool amd_iommu_sev_tio_supported(void)
{
	return check_feature2(FEATURE_SEVSNPIO_SUP);
}
EXPORT_SYMBOL_GPL(amd_iommu_sev_tio_supported);
#endif
+2 −0
Original line number Diff line number Diff line
@@ -18,10 +18,12 @@ struct task_struct;
struct pci_dev;

extern void amd_iommu_detect(void);
extern bool amd_iommu_sev_tio_supported(void);

#else /* CONFIG_AMD_IOMMU */

static inline void amd_iommu_detect(void) { }
static inline bool amd_iommu_sev_tio_supported(void) { return false; }

#endif /* CONFIG_AMD_IOMMU */