Commit ef0baf36 authored by Vedang Nagar's avatar Vedang Nagar Committed by Hans Verkuil
Browse files

media: iris: implement power scaling for vpu2 and vpu3



Implement power scaling including a specific vpu2 and vpu3 calculation
for clock and bus bandwidth, which depends on the hardware
configuration, codec format, resolution and frame rate.

Signed-off-by: default avatarVedang Nagar <quic_vnagar@quicinc.com>
Tested-by: Stefan Schmidt <stefan.schmidt@linaro.org> # x1e80100 (Dell XPS 13 9345)
Reviewed-by: default avatarStefan Schmidt <stefan.schmidt@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK
Signed-off-by: default avatarDikshita Agarwal <quic_dikshita@quicinc.com>
Signed-off-by: default avatarHans Verkuil <hverkuil@xs4all.nl>
parent bdbe1cac
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+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ iris-objs += iris_buffer.o \
             iris_hfi_gen2_response.o \
             iris_hfi_queue.o \
             iris_platform_sm8550.o \
             iris_power.o \
             iris_probe.o \
             iris_resources.o \
             iris_state.o \
+3 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@

#include "iris_buffer.h"
#include "iris_instance.h"
#include "iris_power.h"
#include "iris_vpu_buffer.h"

#define PIXELS_4K 4096
@@ -500,6 +501,8 @@ int iris_queue_deferred_buffers(struct iris_inst *inst, enum iris_buffer_type bu
	struct iris_buffer *buf;
	int ret;

	iris_scale_power(inst);

	if (buf_type == BUF_INPUT) {
		v4l2_m2m_for_each_src_buf_safe(m2m_ctx, buffer, n) {
			buf = to_iris_buffer(&buffer->vb);
+6 −0
Original line number Diff line number Diff line
@@ -33,6 +33,9 @@
 * @state: instance state
 * @sub_state: instance sub state
 * @once_per_session_set: boolean to set once per session property
 * @max_input_data_size: max size of input data
 * @power: structure of power info
 * @icc_data: structure of interconnect data
 * @m2m_dev:	a reference to m2m device structure
 * @m2m_ctx:	a reference to m2m context structure
 * @sequence_cap: a sequence counter for capture queue
@@ -60,6 +63,9 @@ struct iris_inst {
	enum iris_inst_state		state;
	enum iris_inst_sub_state	sub_state;
	bool				once_per_session_set;
	size_t				max_input_data_size;
	struct iris_inst_power		power;
	struct icc_vote_data		icc_data;
	struct v4l2_m2m_dev		*m2m_dev;
	struct v4l2_m2m_ctx		*m2m_ctx;
	u32				sequence_cap;
+23 −0
Original line number Diff line number Diff line
@@ -20,6 +20,8 @@ struct iris_inst;
#define CODED_FRAMES_PROGRESSIVE		0x0
#define DEFAULT_MAX_HOST_BUF_COUNT		64
#define DEFAULT_MAX_HOST_BURST_BUF_COUNT	256
#define DEFAULT_FPS				30

enum stage_type {
	STAGE_1 = 1,
	STAGE_2 = 2,
@@ -67,6 +69,10 @@ struct platform_inst_caps {
	u32 min_frame_height;
	u32 max_frame_height;
	u32 max_mbpf;
	u32 mb_cycles_vsp;
	u32 mb_cycles_vpp;
	u32 mb_cycles_fw;
	u32 mb_cycles_fw_vpp;
	u32 num_comv;
};

@@ -106,11 +112,26 @@ struct platform_inst_fw_cap {
		   enum platform_inst_fw_cap_type cap_id);
};

struct bw_info {
	u32 mbs_per_sec;
	u32 bw_ddr;
};

struct iris_core_power {
	u64 clk_freq;
	u64 icc_bw;
};

struct iris_inst_power {
	u64 min_freq;
	u32 icc_bw;
};

struct icc_vote_data {
	u32 height, width;
	u32 fps;
};

enum platform_pm_domain_type {
	IRIS_CTRL_POWER_DOMAIN,
	IRIS_HW_POWER_DOMAIN,
@@ -124,6 +145,8 @@ struct iris_platform_data {
	void (*set_preset_registers)(struct iris_core *core);
	const struct icc_info *icc_tbl;
	unsigned int icc_tbl_size;
	const struct bw_info *bw_tbl_dec;
	unsigned int bw_tbl_dec_size;
	const char * const *pmdomain_tbl;
	unsigned int pmdomain_tbl_size;
	const char * const *opp_pd_tbl;
+12 −0
Original line number Diff line number Diff line
@@ -126,6 +126,9 @@ static struct platform_inst_caps platform_inst_cap_sm8550 = {
	.min_frame_height = 96,
	.max_frame_height = 8192,
	.max_mbpf = (8192 * 4352) / 256,
	.mb_cycles_vpp = 200,
	.mb_cycles_fw = 489583,
	.mb_cycles_fw_vpp = 66234,
	.num_comv = 0,
};

@@ -141,6 +144,13 @@ static const struct icc_info sm8550_icc_table[] = {

static const char * const sm8550_clk_reset_table[] = { "bus" };

static const struct bw_info sm8550_bw_table_dec[] = {
	{ ((4096 * 2160) / 256) * 60, 1608000 },
	{ ((4096 * 2160) / 256) * 30,  826000 },
	{ ((1920 * 1080) / 256) * 60,  567000 },
	{ ((1920 * 1080) / 256) * 30,  294000 },
};

static const char * const sm8550_pmdomain_table[] = { "venus", "vcodec0" };

static const char * const sm8550_opp_pd_table[] = { "mxc", "mmcx" };
@@ -214,6 +224,8 @@ struct iris_platform_data sm8550_data = {
	.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
	.clk_rst_tbl = sm8550_clk_reset_table,
	.clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table),
	.bw_tbl_dec = sm8550_bw_table_dec,
	.bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec),
	.pmdomain_tbl = sm8550_pmdomain_table,
	.pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table),
	.opp_pd_tbl = sm8550_opp_pd_table,
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