Commit ef124412 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'usb-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb 

Pull USB and Thunderbolt updates from Greg KH:
 "Here is the big set of USB and Thunderbolt driver updates for
  5.13-rc1.

  Lots of little things in here, with loads of tiny fixes and cleanups
  over these drivers, as well as these "larger" changes:

   - thunderbolt updates and new features added

   - xhci driver updates and split out of a mediatek-specific xhci
     driver from the main xhci module to make it easier to work with
     (something that I have been wanting for a while).

   - loads of typec feature additions and updates

   - dwc2 driver updates

   - dwc3 driver updates

   - gadget driver fixes and minor updates

   - loads of usb-serial cleanups and fixes and updates

   - usbip documentation updates and fixes

   - lots of other tiny USB driver updates

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'usb-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (371 commits)
  usb: Fix up movement of USB core kerneldoc location
  usb: dwc3: gadget: Handle DEV_TXF_FLUSH_BYPASS capability
  usb: dwc3: Capture new capability register GHWPARAMS9
  usb: gadget: prevent a ternary sign expansion bug
  usb: dwc3: core: Do core softreset when switch mode
  usb: dwc2: Get rid of useless error checks in suspend interrupt
  usb: dwc2: Update dwc2_handle_usb_suspend_intr function.
  usb: dwc2: Add exit hibernation mode before removing drive
  usb: dwc2: Add hibernation exiting flow by system resume
  usb: dwc2: Add hibernation entering flow by system suspend
  usb: dwc2: Allow exit hibernation in urb enqueue
  usb: dwc2: Move exit hibernation to dwc2_port_resume() function
  usb: dwc2: Move enter hibernation to dwc2_port_suspend() function
  usb: dwc2: Clear GINTSTS_RESTOREDONE bit after restore is generated.
  usb: dwc2: Clear fifo_map when resetting core.
  usb: dwc2: Allow exiting hibernation from gpwrdn rst detect
  usb: dwc2: Fix hibernation between host and device modes.
  usb: dwc2: Fix host mode hibernation exit with remote wakeup flow.
  usb: dwc2: Reset DEVADDR after exiting gadget hibernation.
  usb: dwc2: Update exit hibernation when port reset is asserted
  ...
parents d08410d8 caa93d9b

Documentation/ABI/testing/sysfs-bus-thunderbolt

+7 −28
Original line number Diff line number Diff line 
What:		/sys/bus/thunderbolt/devices/<xdomain>/rx_speed

Date:		Feb 2021

KernelVersion:	5.11

Contact:	Isaac Hazan <isaac.hazan@intel.com>

Description:	This attribute reports the XDomain RX speed per lane.

		All RX lanes run at the same speed.



What:		/sys/bus/thunderbolt/devices/<xdomain>/rx_lanes

Date:		Feb 2021

KernelVersion:	5.11

Contact:	Isaac Hazan <isaac.hazan@intel.com>

Description:	This attribute reports the number of RX lanes the XDomain

		is using simultaneously through its upstream port.



What:		/sys/bus/thunderbolt/devices/<xdomain>/tx_speed

Date:		Feb 2021

KernelVersion:	5.11

Contact:	Isaac Hazan <isaac.hazan@intel.com>

Description:	This attribute reports the XDomain TX speed per lane.

		All TX lanes run at the same speed.



What:		/sys/bus/thunderbolt/devices/<xdomain>/tx_lanes

Date:		Feb 2021

KernelVersion:	5.11

Contact:	Isaac Hazan <isaac.hazan@intel.com>

Description:	This attribute reports number of TX lanes the XDomain

		is using simultaneously through its upstream port.



What: /sys/bus/thunderbolt/devices/.../domainX/boot_acl

Date:		Jun 2018

KernelVersion:	4.17
@@ -162,6 +134,13 @@ Contact: thunderbolt-software@lists.01.org 
Description:	This attribute contains name of this device extracted from

		the device DROM.



What:		/sys/bus/thunderbolt/devices/.../maxhopid

Date:		Jul 2021

KernelVersion:	5.13

Contact:	Mika Westerberg <mika.westerberg@linux.intel.com>

Description:	Only set for XDomains. The maximum HopID the other host

		supports as its input HopID.



What:		/sys/bus/thunderbolt/devices/.../rx_speed

Date:		Jan 2020

KernelVersion:	5.5

Documentation/devicetree/bindings/connector/usb-connector.yaml

+10 −0
Original line number Diff line number Diff line
@@ -197,6 +197,16 @@ properties: 
    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [1, 2, 3]



  slow-charger-loop:

    description: Allows PMIC charger loops which are slow(i.e. cannot meet the 15ms deadline) to

      still comply to pSnkStby i.e Maximum power that can be consumed by sink while in Sink Standby

      state as defined in 7.4.2 Sink Electrical Parameters of USB Power Delivery Specification

      Revision 3.0, Version 1.2. When the property is set, the port requests pSnkStby(2.5W -

      5V@500mA) upon entering SNK_DISCOVERY(instead of 3A or the 1.5A, Rp current advertised, during

      SNK_DISCOVERY) and the actual currrent limit after reception of PS_Ready for PD link or during

      SNK_READY for non-pd link.

    type: boolean



required:

  - compatible

Documentation/devicetree/bindings/usb/dwc3-xilinx.txt

+26 −2
Original line number Diff line number Diff line 
Xilinx SuperSpeed DWC3 USB SoC controller



Required properties:

- compatible:	Should contain "xlnx,zynqmp-dwc3"

- compatible:	May contain "xlnx,zynqmp-dwc3" or "xlnx,versal-dwc3"

- reg:		Base address and length of the register control block

- clocks:	A list of phandles for the clocks listed in clock-names

- clock-names:	Should contain the following:

  "bus_clk"	 Master/Core clock, have to be >= 125 MHz for SS

		 operation and >= 60MHz for HS operation



  "ref_clk"	 Clock source to core during PHY power down

- resets:	A list of phandles for resets listed in reset-names

- reset-names:

  "usb_crst"	 USB core reset

  "usb_hibrst"	 USB hibernation reset

  "usb_apbrst"	 USB APB reset



Required child node:

A child node must exist to represent the core DWC3 IP block. The name of

the node is not important. The content of the node is defined in dwc3.txt.



Optional properties for snps,dwc3:

- dma-coherent:	Enable this flag if CCI is enabled in design. Adding this

		flag configures Global SoC bus Configuration Register and

		Xilinx USB 3.0 IP - USB coherency register to enable CCI.

- interrupt-names: Should contain the following:

  "dwc_usb3"	USB gadget mode interrupts

  "otg"		USB OTG mode interrupts

  "hiber"	USB hibernation interrupts



Example device node:



		usb@0 {

			#address-cells = <0x2>;

			#size-cells = <0x1>;

			compatible = "xlnx,zynqmp-dwc3";

			reg = <0x0 0xff9d0000 0x0 0x100>;

			clock-names = "bus_clk", "ref_clk";

			clocks = <&clk125>, <&clk125>;

			resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,

				 <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,

				 <&zynqmp_reset ZYNQMP_RESET_USB1_APB>;

			reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";

			ranges;



			dwc3@fe200000 {

				compatible = "snps,dwc3";

				reg = <0x0 0xfe200000 0x40000>;

				interrupts = <0x0 0x41 0x4>;

				interrupt-names = "dwc_usb3", "otg", "hiber";

				interrupts = <0 65 4>, <0 69 4>, <0 75 4>;

				phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;

				phy-names = "usb3-phy";

				dr_mode = "host";

				dma-coherent;

			};

		};

Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml

+3 −6
Original line number Diff line number Diff line
@@ -52,11 +52,8 @@ properties: 
# Required child node:



patternProperties:

  "^dwc3@[0-9a-f]+$":

    type: object

    description:

      A child node must exist to represent the core DWC3 IP block

      The content of the node is defined in dwc3.txt.

  "^usb@[0-9a-f]+$":

    $ref: snps,dwc3.yaml#



required:

  - compatible
@@ -87,7 +84,7 @@ examples: 
      dma-ranges = <0x40000000 0x40000000 0xc0000000>;

      ranges;



      dwc3@38100000 {

      usb@38100000 {

        compatible = "snps,dwc3";

        reg = <0x38100000 0x10000>;

        clocks = <&clk IMX8MP_CLK_HSIO_AXI>,

Documentation/devicetree/bindings/usb/generic-ehci.yaml

+6 −0
Original line number Diff line number Diff line
@@ -122,6 +122,12 @@ properties: 
    description:

      Set this flag to force EHCI reset after resume.



  spurious-oc:

    $ref: /schemas/types.yaml#/definitions/flag

    description:

      Set this flag to indicate that the hardware sometimes turns on

      the OC bit when an over-current isn't actually present.



  companion:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: