Commit ef162ac5 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Nicolas Ferre
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ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail



SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The
1.35V for DDR3L rail at run-time is selected by the proper configuration
on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended
the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of
configuration registers to provide proper voltages on its rail. Run-time
configuration registers could be configured differently than suspend
configuration register for MCP16502 (VSEL2 affects only run-time
configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK
switches to self-refresh. Even on self-refresh it needs to be powered by
a 1.35V rail. Thus, make sure the PMIC is configured properly when system
is suspended.

Fixes: 7540629e (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
parent 4348cc10
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Original line number Diff line number Diff line
@@ -196,11 +196,13 @@ vddioddr: VDD_DDR {

					regulator-state-standby {
						regulator-on-in-suspend;
						regulator-suspend-microvolt = <1350000>;
						regulator-mode = <4>;
					};

					regulator-state-mem {
						regulator-on-in-suspend;
						regulator-suspend-microvolt = <1350000>;
						regulator-mode = <4>;
					};
				};