Commit ef2f7986 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'perf/urgent' into perf/core, to pick up dependent patches and fixes 



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 3acfcefa 003659fe

.mailmap

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@@ -226,6 +226,7 @@ Fangrui Song <i@maskray.me> <maskray@google.com> 
Felipe W Damasio <felipewd@terra.com.br>

Felix Kuhling <fxkuehl@gmx.de>

Felix Moeller <felix@derklecks.de>

Feng Tang <feng.79.tang@gmail.com> <feng.tang@intel.com>

Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org>

Filipe Lautert <filipe@icewall.org>

Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au>
@@ -317,6 +318,8 @@ Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com> 
Jean Tourrilhes <jt@hpl.hp.com>

Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org>

Jeff Garzik <jgarzik@pretzel.yyz.us>

Jeff Johnson <jeff.johnson@oss.qualcomm.com> <jjohnson@codeaurora.org>

Jeff Johnson <jeff.johnson@oss.qualcomm.com> <quic_jjohnson@quicinc.com>

Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net>

Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com>

Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com>
@@ -519,6 +522,7 @@ Nadav Amit <nadav.amit@gmail.com> <namit@cs.technion.ac.il> 
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>

Naoya Horiguchi <nao.horiguchi@gmail.com> <n-horiguchi@ah.jp.nec.com>

Naoya Horiguchi <nao.horiguchi@gmail.com> <naoya.horiguchi@nec.com>

Natalie Vock <natalie.vock@gmx.de> <friedrich.vock@gmx.de>

Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>

Naveen N Rao <naveen@kernel.org> <naveen.n.rao@linux.ibm.com>

Naveen N Rao <naveen@kernel.org> <naveen.n.rao@linux.vnet.ibm.com>
@@ -531,6 +535,7 @@ Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk> 
Nicholas Piggin <npiggin@gmail.com> <npiggin@suse.de>

Nicholas Piggin <npiggin@gmail.com> <nickpiggin@yahoo.com.au>

Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au>

Nick Desaulniers <nick.desaulniers+lkml@gmail.com> <ndesaulniers@google.com>

Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com>

Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>

Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>
@@ -609,6 +614,8 @@ Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net> 
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>

Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>

Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>

Rodrigo Siqueira <siqueira@igalia.com> <rodrigosiqueiramelo@gmail.com>

Rodrigo Siqueira <siqueira@igalia.com> <Rodrigo.Siqueira@amd.com>

Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>

Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>

Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>

Documentation/arch/powerpc/cxl.rst

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@@ -18,6 +18,7 @@ Introduction 
    both access system memory directly and with the same effective

    addresses.



    **This driver is deprecated and will be removed in a future release.**



Hardware overview

=================
@@ -453,7 +454,7 @@ Sysfs Class 


    A cxl sysfs class is added under /sys/class/cxl to facilitate

    enumeration and tuning of the accelerators. Its layout is

    described in Documentation/ABI/testing/sysfs-class-cxl

    described in Documentation/ABI/obsolete/sysfs-class-cxl





Udev rules

Documentation/arch/x86/sva.rst

+2 −2
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@@ -25,7 +25,7 @@ to cache translations for virtual addresses. The IOMMU driver uses the 
mmu_notifier() support to keep the device TLB cache and the CPU cache in

sync. When an ATS lookup fails for a virtual address, the device should

use the PRI in order to request the virtual address to be paged into the

CPU page tables. The device must use ATS again in order the fetch the

CPU page tables. The device must use ATS again in order to fetch the

translation before use.



Shared Hardware Workqueues
@@ -216,7 +216,7 @@ submitting work and processing completions. 


Single Root I/O Virtualization (SR-IOV) focuses on providing independent

hardware interfaces for virtualizing hardware. Hence, it's required to be

almost fully functional interface to software supporting the traditional

an almost fully functional interface to software supporting the traditional

BARs, space for interrupts via MSI-X, its own register layout.

Virtual Functions (VFs) are assisted by the Physical Function (PF)

driver.

Documentation/devicetree/bindings/arm/rockchip/pmu.yaml

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@@ -53,11 +53,17 @@ properties: 
  reg:

    maxItems: 1



  power-controller:

    type: object



  reboot-mode:

    type: object



required:

  - compatible

  - reg



additionalProperties: true

additionalProperties: false



examples:

  - |

Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml

+7 −1
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@@ -33,6 +33,10 @@ properties: 
  clocks:

    maxItems: 1



  clock-names:

    items:

      - const: nf_clk



  dmas:

    maxItems: 1
@@ -51,6 +55,7 @@ required: 
  - reg-names

  - interrupts

  - clocks

  - clock-names



unevaluatedProperties: false
@@ -66,7 +71,8 @@ examples: 
        #address-cells = <1>;

        #size-cells = <0>;

        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&nf_clk>;

        clocks = <&clk>;

        clock-names = "nf_clk";

        cdns,board-delay-ps = <4830>;



        nand@0 {