Commit ef3ff403 authored by Sergey Matyukevich's avatar Sergey Matyukevich Committed by Paul Walmsley
Browse files

riscv: vector: init vector context with proper vlenb 



The vstate in thread_struct is zeroed when the vector context is
initialized. That includes read-only register vlenb, which holds
the vector register length in bytes. Zeroed state persists until
mstatus.VS becomes 'dirty' and a context switch saves the actual
hardware values.

This can expose the zero vlenb value to the user-space in early
debug scenarios, e.g. when ptrace attaches to a traced process
early, before any vector instruction except the first one was
executed.

Fix this by specifying proper vlenb on vector context init.

Signed-off-by: default avatarSergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: default avatarAndy Chiu <andybnac@gmail.com>
Tested-by: default avatarAndy Chiu <andybnac@gmail.com>
Link: https://patch.msgid.link/20251214163537.1054292-3-geomatsi@gmail.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 8cdb04bd

arch/riscv/kernel/vector.c

+8 −4
Original line number Diff line number Diff line
@@ -111,7 +111,7 @@ bool insn_is_vector(u32 insn_buf) 
	return false;

}



static int riscv_v_thread_zalloc(struct kmem_cache *cache,

static int riscv_v_thread_ctx_alloc(struct kmem_cache *cache,

				    struct __riscv_v_ext_state *ctx)

{

	void *datap;
@@ -122,13 +122,15 @@ static int riscv_v_thread_zalloc(struct kmem_cache *cache, 


	ctx->datap = datap;

	memset(ctx, 0, offsetof(struct __riscv_v_ext_state, datap));

	ctx->vlenb = riscv_v_vsize / 32;



	return 0;

}



void riscv_v_thread_alloc(struct task_struct *tsk)

{

#ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE

	riscv_v_thread_zalloc(riscv_v_kernel_cachep, &tsk->thread.kernel_vstate);

	riscv_v_thread_ctx_alloc(riscv_v_kernel_cachep, &tsk->thread.kernel_vstate);

#endif

}
@@ -214,12 +216,14 @@ bool riscv_v_first_use_handler(struct pt_regs *regs) 
	 * context where VS has been off. So, try to allocate the user's V

	 * context and resume execution.

	 */

	if (riscv_v_thread_zalloc(riscv_v_user_cachep, &current->thread.vstate)) {

	if (riscv_v_thread_ctx_alloc(riscv_v_user_cachep, &current->thread.vstate)) {

		force_sig(SIGBUS);

		return true;

	}



	riscv_v_vstate_on(regs);

	riscv_v_vstate_set_restore(current, regs);



	return true;

}