Unverified Commit ef6a24c7 authored by Nícolas F. R. A. Prado's avatar Nícolas F. R. A. Prado Committed by Mark Brown
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ASoC: mediatek: mt8188: Add audsys hires clocks 



Describe and register the aud_dmic_hires audsys clocks, which are needed
when recording the DMIC at a sample rate of 96k.

Signed-off-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20250225-genio700-dmic-v2-1-3076f5b50ef7@collabora.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 10efa807

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

+4 −0
Original line number Diff line number Diff line
@@ -84,6 +84,10 @@ static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { 
	GATE_AUD1(CLK_AUD_AFE_26M_DMIC_TM, "aud_afe_26m_dmic_tm", "top_a1sys_hp", 14),

	GATE_AUD1(CLK_AUD_UL_TML_HIRES, "aud_ul_tml_hires", "top_audio_h", 16),

	GATE_AUD1(CLK_AUD_ADC_HIRES, "aud_adc_hires", "top_audio_h", 17),

	GATE_AUD1(CLK_AUD_DMIC_HIRES1, "aud_dmic_hires1", "top_audio_h", 20),

	GATE_AUD1(CLK_AUD_DMIC_HIRES2, "aud_dmic_hires2", "top_audio_h", 21),

	GATE_AUD1(CLK_AUD_DMIC_HIRES3, "aud_dmic_hires3", "top_audio_h", 22),

	GATE_AUD1(CLK_AUD_DMIC_HIRES4, "aud_dmic_hires4", "top_audio_h", 23),



	/* AUD3 */

	GATE_AUD3(CLK_AUD_LINEIN_TUNER, "aud_linein_tuner", "top_apll5", 5),

sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h

+4 −0
Original line number Diff line number Diff line
@@ -33,6 +33,10 @@ enum{ 
	CLK_AUD_AFE_26M_DMIC_TM,

	CLK_AUD_UL_TML_HIRES,

	CLK_AUD_ADC_HIRES,

	CLK_AUD_DMIC_HIRES1,

	CLK_AUD_DMIC_HIRES2,

	CLK_AUD_DMIC_HIRES3,

	CLK_AUD_DMIC_HIRES4,

	CLK_AUD_LINEIN_TUNER,

	CLK_AUD_EARC_TUNER,

	CLK_AUD_I2SIN,