Commit ef7bfe5b authored by Jason Gunthorpe's avatar Jason Gunthorpe Committed by Joerg Roedel
Browse files

iommupt/x86: Support SW bits and permit PT_FEAT_DMA_INCOHERENT 



VT-d requires PT_FEAT_DMA_INCOHERENT for the x86 page table as well,
implement the required SW bits and enable the feature.

Reviewed-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 1978fac2

drivers/iommu/generic_pt/fmt/iommu_x86_64.c

+1 −1
Original line number Diff line number Diff line
@@ -6,6 +6,6 @@ 
#define PT_SUPPORTED_FEATURES                                  \

	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \

	 BIT(PT_FEAT_FLUSH_RANGE_NO_GAPS) |                    \

	 BIT(PT_FEAT_X86_64_AMD_ENCRYPT_TABLES))

	 BIT(PT_FEAT_X86_64_AMD_ENCRYPT_TABLES) | BIT(PT_FEAT_DMA_INCOHERENT))



#include "iommu_template.h"

drivers/iommu/generic_pt/fmt/x86_64.h

+27 −0
Original line number Diff line number Diff line
@@ -167,6 +167,33 @@ static inline void x86_64_pt_attr_from_entry(const struct pt_state *pts, 
}

#define pt_attr_from_entry x86_64_pt_attr_from_entry



static inline unsigned int x86_64_pt_max_sw_bit(struct pt_common *common)

{

	return 12;

}

#define pt_max_sw_bit x86_64_pt_max_sw_bit



static inline u64 x86_64_pt_sw_bit(unsigned int bitnr)

{

	/* Bits marked Ignored/AVL in the specification */

	switch (bitnr) {

	case 0:

		return BIT(9);

	case 1:

		return BIT(11);

	case 2 ... 12:

		return BIT_ULL((bitnr - 2) + 52);

	/* Some bits in 8,6,4,3 are available in some entries */

	default:

		if (__builtin_constant_p(bitnr))

			BUILD_BUG();

		else

			PT_WARN_ON(true);

		return 0;

	}

}

#define pt_sw_bit x86_64_pt_sw_bit



/* --- iommu */

#include <linux/generic_pt/iommu.h>

#include <linux/iommu.h>