Commit f04b8a5a authored by Marc Zyngier's avatar Marc Zyngier Committed by Oliver Upton
Browse files

KVM: arm64: Turn kvm_vgic_vcpu_enable() into kvm_vgic_vcpu_reset() 



Now that we always reconfigure the vgic HCR register on entry,
the "enable" part of kvm_vgic_vcpu_enable() is pretty useless.

Removing the enable bits from these functions makes it plain that
they are just about computing the reset state. Just rename the
functions accordingly.

Tested-by: default avatarFuad Tabba <tabba@google.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Tested-by: default avatarMark Brown <broonie@kernel.org>
Link: https://msgid.link/20251120172540.2267180-23-maz@kernel.org


Signed-off-by: default avatarOliver Upton <oupton@kernel.org>
parent 6780a756

arch/arm64/kvm/vgic/vgic-init.c

+4 −4
Original line number Diff line number Diff line
@@ -353,12 +353,12 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu) 
	return ret;

}



static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu)

static void kvm_vgic_vcpu_reset(struct kvm_vcpu *vcpu)

{

	if (kvm_vgic_global_state.type == VGIC_V2)

		vgic_v2_enable(vcpu);

		vgic_v2_reset(vcpu);

	else

		vgic_v3_enable(vcpu);

		vgic_v3_reset(vcpu);

}



/*
@@ -405,7 +405,7 @@ int vgic_init(struct kvm *kvm) 
	}



	kvm_for_each_vcpu(idx, vcpu, kvm)

		kvm_vgic_vcpu_enable(vcpu);

		kvm_vgic_vcpu_reset(vcpu);



	ret = kvm_vgic_setup_default_irq_routing(kvm);

	if (ret)

arch/arm64/kvm/vgic/vgic-v2.c

+1 −4
Original line number Diff line number Diff line
@@ -285,7 +285,7 @@ void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp) 
			GICH_VMCR_PRIMASK_SHIFT) << GICV_PMR_PRIORITY_SHIFT;

}



void vgic_v2_enable(struct kvm_vcpu *vcpu)

void vgic_v2_reset(struct kvm_vcpu *vcpu)

{

	/*

	 * By forcing VMCR to zero, the GIC will restore the binary
@@ -293,9 +293,6 @@ void vgic_v2_enable(struct kvm_vcpu *vcpu) 
	 * anyway.

	 */

	vcpu->arch.vgic_cpu.vgic_v2.vgic_vmcr = 0;



	/* Get the show on the road... */

	vcpu->arch.vgic_cpu.vgic_v2.vgic_hcr = GICH_HCR_EN;

}



/* check for overlapping regions and for regions crossing the end of memory */

arch/arm64/kvm/vgic/vgic-v3.c

+1 −4
Original line number Diff line number Diff line
@@ -293,7 +293,7 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp) 
	GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, SameAsInner)	| \

	GIC_BASER_SHAREABILITY(GICR_PENDBASER, InnerShareable))



void vgic_v3_enable(struct kvm_vcpu *vcpu)

void vgic_v3_reset(struct kvm_vcpu *vcpu)

{

	struct vgic_v3_cpu_if *vgic_v3 = &vcpu->arch.vgic_cpu.vgic_v3;
@@ -323,9 +323,6 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu) 
						    kvm_vgic_global_state.ich_vtr_el2);

	vcpu->arch.vgic_cpu.num_pri_bits = FIELD_GET(ICH_VTR_EL2_PRIbits,

						     kvm_vgic_global_state.ich_vtr_el2) + 1;



	/* Get the show on the road... */

	vgic_v3->vgic_hcr = ICH_HCR_EL2_En;

}



void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu)

arch/arm64/kvm/vgic/vgic.h

+2 −2
Original line number Diff line number Diff line
@@ -285,7 +285,7 @@ int vgic_v2_cpuif_uaccess(struct kvm_vcpu *vcpu, bool is_write, 
			  int offset, u32 *val);

void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);

void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);

void vgic_v2_enable(struct kvm_vcpu *vcpu);

void vgic_v2_reset(struct kvm_vcpu *vcpu);

int vgic_v2_probe(const struct gic_kvm_info *info);

int vgic_v2_map_resources(struct kvm *kvm);

int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
@@ -320,7 +320,7 @@ void vgic_v3_clear_lr(struct kvm_vcpu *vcpu, int lr); 
void vgic_v3_configure_hcr(struct kvm_vcpu *vcpu, struct ap_list_summary *als);

void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);

void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);

void vgic_v3_enable(struct kvm_vcpu *vcpu);

void vgic_v3_reset(struct kvm_vcpu *vcpu);

int vgic_v3_probe(const struct gic_kvm_info *info);

int vgic_v3_map_resources(struct kvm *kvm);

int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq);