Commit f06ac3ed authored by Xianwei Zhao's avatar Xianwei Zhao Committed by Jerome Brunet
Browse files

clk: meson: c3: add c3 clock peripherals controller driver



Add the C3 peripherals clock controller driver in the C3 SoC family.

[jbrunet: fix Kconfig select order and probe function name]
Co-developed-by: default avatarChuan Liu <chuan.liu@amlogic.com>
Signed-off-by: default avatarChuan Liu <chuan.liu@amlogic.com>
Signed-off-by: default avatarXianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240522082727.3029656-6-xianwei.zhao@amlogic.com


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent 8a9a129d
Loading
Loading
Loading
Loading
+14 −0
Original line number Diff line number Diff line
@@ -145,6 +145,20 @@ config COMMON_CLK_C3_PLL
	  AKA C3. Say Y if you want the board to work, because PLLs are the parent
	  of most peripherals.

config COMMON_CLK_C3_PERIPHERALS
	tristate "Amlogic C3 peripherals clock controller"
	depends on ARM64
	default y
	select COMMON_CLK_MESON_REGMAP
	select COMMON_CLK_MESON_DUALDIV
	select COMMON_CLK_MESON_CLKC_UTILS
	imply COMMON_CLK_SCMI
	imply COMMON_CLK_C3_PLL
	help
	  Support for the Peripherals clock controller on Amlogic C302X and
	  C308L devices, AKA C3. Say Y if you want the peripherals clock to
	  work.

config COMMON_CLK_G12A
	tristate "G12 and SM1 SoC clock controllers support"
	depends on ARM64
+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o
obj-$(CONFIG_COMMON_CLK_A1_PLL) += a1-pll.o
obj-$(CONFIG_COMMON_CLK_A1_PERIPHERALS) += a1-peripherals.o
obj-$(CONFIG_COMMON_CLK_C3_PLL) += c3-pll.o
obj-$(CONFIG_COMMON_CLK_C3_PERIPHERALS) += c3-peripherals.o
obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
obj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o
obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o meson8-ddr.o
+2365 −0

File added.

Preview size limit exceeded, changes collapsed.