Commit f083f8a2 authored by Angelo Dureghello's avatar Angelo Dureghello Committed by Jonathan Cameron
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iio: adc: ad7606: fix serial register access



Fix register read/write routine as per datasheet.

When reading multiple consecutive registers, only the first one is read
properly. This is due to missing chip select deassert and assert again
between first and second 16bit transfer, as shown in the datasheet
AD7606C-16, rev 0, figure 110.

Fixes: f2a22e1e ("iio: adc: ad7606: Add support for software mode for ad7616")
Reviewed-by: default avatarDavid Lechner <dlechner@baylibre.com>
Signed-off-by: default avatarAngelo Dureghello <adureghello@baylibre.com>
Link: https://patch.msgid.link/20250418-wip-bl-ad7606-fix-reg-access-v3-1-d5eeb440c738@baylibre.com


Cc: <Stable@vger.kernel.org>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent ffcd19e9
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+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ static int ad7606_spi_reg_read(struct ad7606_state *st, unsigned int addr)
		{
			.tx_buf = &st->d16[0],
			.len = 2,
			.cs_change = 0,
			.cs_change = 1,
		}, {
			.rx_buf = &st->d16[1],
			.len = 2,