Loading arch/arm/mach-tegra/Kconfig +0 −2 Original line number Diff line number Diff line Loading @@ -20,8 +20,6 @@ config ARCH_TEGRA_2x_SOC select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0 select CPU_FREQ_TABLE if CPU_FREQ select MEMORY select TEGRA20_MC help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller Loading drivers/memory/Kconfig +7 −1 Original line number Diff line number Diff line Loading @@ -21,8 +21,14 @@ config TI_EMIF temperature changes config TEGRA20_MC bool bool "Tegra20 Memory Controller(MC) driver" default y depends on ARCH_TEGRA_2x_SOC help This driver is for the Memory Controller(MC) module available in Tegra20 SoCs, mainly for a address translation fault analysis, especially for IOMMU/GART(Graphics Address Relocation Table) module. config TEGRA30_MC bool Loading Loading
arch/arm/mach-tegra/Kconfig +0 −2 Original line number Diff line number Diff line Loading @@ -20,8 +20,6 @@ config ARCH_TEGRA_2x_SOC select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0 select CPU_FREQ_TABLE if CPU_FREQ select MEMORY select TEGRA20_MC help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller Loading
drivers/memory/Kconfig +7 −1 Original line number Diff line number Diff line Loading @@ -21,8 +21,14 @@ config TI_EMIF temperature changes config TEGRA20_MC bool bool "Tegra20 Memory Controller(MC) driver" default y depends on ARCH_TEGRA_2x_SOC help This driver is for the Memory Controller(MC) module available in Tegra20 SoCs, mainly for a address translation fault analysis, especially for IOMMU/GART(Graphics Address Relocation Table) module. config TEGRA30_MC bool Loading