Commit f11f3f76 authored by Jason Gunthorpe's avatar Jason Gunthorpe
Browse files

Merge branch 'mlx5_ipoib_qpn' into rdma.git for-next 

Michael Guralnik says:

====================
This series handles IPoIB child interface creation with setting
interface's HW address.

In current implementation, lladdr requested by user is ignored and
overwritten. Child interface gets the same GID as the parent interface and
a QP number which is assigned by the underlying drivers.

In this series we fix this behavior so that user's requested address is
assigned to the newly created interface.

As specific QP number request is not supported for all vendors, QP number
requested by user will still be overwritten when this is not supported.

Behavior of creation of child interfaces through the sysfs mechanism or
without specifying a requested address, stays the same.
====================

Based on the mlx5-next branch at
      git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux


due to dependencies.

* branch 'mlx5_ipoib_qpn':
  RDMA/ipoib: Handle user-supplied address when creating child
  net/mlx5: Enable QP number request when creating IPoIB underlay QP

Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parents d473f4dc 87fb5c1c

drivers/infiniband/ulp/ipoib/ipoib_main.c

+9 −2
Original line number Diff line number Diff line
@@ -1892,8 +1892,15 @@ static void ipoib_child_init(struct net_device *ndev) 


	priv->max_ib_mtu = ppriv->max_ib_mtu;

	set_bit(IPOIB_FLAG_SUBINTERFACE, &priv->flags);

	memcpy(priv->dev->dev_addr, ppriv->dev->dev_addr, INFINIBAND_ALEN);

	memcpy(&priv->local_gid, &ppriv->local_gid, sizeof(priv->local_gid));

	if (memchr_inv(priv->dev->dev_addr, 0, INFINIBAND_ALEN))

		memcpy(&priv->local_gid, priv->dev->dev_addr + 4,

		       sizeof(priv->local_gid));

	else {

		memcpy(priv->dev->dev_addr, ppriv->dev->dev_addr,

		       INFINIBAND_ALEN);

		memcpy(&priv->local_gid, &ppriv->local_gid,

		       sizeof(priv->local_gid));

	}

}



static int ipoib_ndo_init(struct net_device *ndev)

drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h

+1 −1
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map, 


static inline bool mlx5e_transport_inline_tx_wqe(struct mlx5_wqe_ctrl_seg *cseg)

{

	return cseg && !!cseg->tisn;

	return cseg && !!cseg->tis_tir_num;

}



static inline u8

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h

+1 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 


#define MLX5E_KTLS_PROGRESS_WQE_SZ \

	(offsetof(struct mlx5e_tx_wqe, tls_progress_params_ctx) + \

	 MLX5_ST_SZ_BYTES(tls_progress_params))

	 sizeof(struct mlx5_wqe_tls_progress_params_seg))

#define MLX5E_KTLS_PROGRESS_WQEBBS \

	(DIV_ROUND_UP(MLX5E_KTLS_PROGRESS_WQE_SZ, MLX5_SEND_WQE_BB))

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c

+9 −5
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ build_static_params(struct mlx5e_umr_wqe *wqe, u16 pc, u32 sqn, 
	cseg->qpn_ds           = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) |

					     STATIC_PARAMS_DS_CNT);

	cseg->fm_ce_se         = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;

	cseg->tisn             = cpu_to_be32(priv_tx->tisn << 8);

	cseg->tis_tir_num      = cpu_to_be32(priv_tx->tisn << 8);



	ucseg->flags = MLX5_UMR_INLINE;

	ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16);
@@ -75,10 +75,14 @@ build_static_params(struct mlx5e_umr_wqe *wqe, u16 pc, u32 sqn, 
static void

fill_progress_params_ctx(void *ctx, struct mlx5e_ktls_offload_context_tx *priv_tx)

{

	MLX5_SET(tls_progress_params, ctx, tisn, priv_tx->tisn);

	MLX5_SET(tls_progress_params, ctx, record_tracker_state,

	struct mlx5_wqe_tls_progress_params_seg *params;



	params = ctx;



	params->tis_tir_num = cpu_to_be32(priv_tx->tisn);

	MLX5_SET(tls_progress_params, params->ctx, record_tracker_state,

		 MLX5E_TLS_PROGRESS_PARAMS_RECORD_TRACKER_STATE_START);

	MLX5_SET(tls_progress_params, ctx, auth_state,

	MLX5_SET(tls_progress_params, params->ctx, auth_state,

		 MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD);

}
@@ -284,7 +288,7 @@ tx_post_resync_dump(struct mlx5e_txqsq *sq, skb_frag_t *frag, u32 tisn, bool fir 


	cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8)  | MLX5_OPCODE_DUMP);

	cseg->qpn_ds           = cpu_to_be32((sq->sqn << 8) | ds_cnt);

	cseg->tisn             = cpu_to_be32(tisn << 8);

	cseg->tis_tir_num      = cpu_to_be32(tisn << 8);

	cseg->fm_ce_se         = first ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;



	fsz = skb_frag_size(frag);

drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_rxtx.c

+1 −1
Original line number Diff line number Diff line
@@ -305,7 +305,7 @@ bool mlx5e_tls_handle_tx_skb(struct net_device *netdev, struct mlx5e_txqsq *sq, 
void mlx5e_tls_handle_tx_wqe(struct mlx5e_txqsq *sq, struct mlx5_wqe_ctrl_seg *cseg,

			     struct mlx5e_accel_tx_tls_state *state)

{

	cseg->tisn = cpu_to_be32(state->tls_tisn << 8);

	cseg->tis_tir_num = cpu_to_be32(state->tls_tisn << 8);

}



static int tls_update_resync_sn(struct net_device *netdev,