Commit f1b59121 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-imx-6.8' of... 

Merge tag 'clk-imx-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx

Pull i.MX clk driver updates from Abel Vesa:

 - Document bindings for i.MX93 ANATOP clock driver
 - Free clk_node in SCU driver for resource with different owner
 - Update the LVDS clocks to be compatible with SCU firmware 1.15
 - Fix the name of the fvco in pll14xx by renaming it to fout

* tag 'clk-imx-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module
parents b85ea95d f52f0006

Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yaml

0 → 100644
+42 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP i.MX93 ANATOP Clock Module



maintainers:

  - Peng Fan <peng.fan@nxp.com>



description: |

  NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller

  Module.



properties:

  compatible:

    items:

      - const: fsl,imx93-anatop



  reg:

    maxItems: 1



  '#clock-cells':

    const: 1



required:

  - compatible

  - reg

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    clock-controller@44480000 {

        compatible = "fsl,imx93-anatop";

        reg = <0x44480000 0x2000>;

        #clock-cells = <1>;

    };



...

drivers/clk/imx/clk-imx8qxp.c

+20 −4
Original line number Diff line number Diff line
@@ -66,6 +66,22 @@ static const char * const lcd_pxl_sels[] = { 
	"lcd_pxl_bypass_div_clk",

};



static const char *const lvds0_sels[] = {

	"clk_dummy",

	"clk_dummy",

	"clk_dummy",

	"clk_dummy",

	"mipi0_lvds_bypass_clk",

};



static const char *const lvds1_sels[] = {

	"clk_dummy",

	"clk_dummy",

	"clk_dummy",

	"clk_dummy",

	"mipi1_lvds_bypass_clk",

};



static const char * const mipi_sels[] = {

	"clk_dummy",

	"clk_dummy",
@@ -207,9 +223,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) 
	/* MIPI-LVDS SS */

	imx_clk_scu("mipi0_bypass_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_BYPASS);

	imx_clk_scu("mipi0_pixel_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PER);

	imx_clk_scu("mipi0_lvds_pixel_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2);

	imx_clk_scu("mipi0_lvds_bypass_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_BYPASS);

	imx_clk_scu("mipi0_lvds_phy_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3);

	imx_clk_scu2("mipi0_lvds_pixel_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2);

	imx_clk_scu2("mipi0_lvds_phy_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3);

	imx_clk_scu2("mipi0_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_MST_BUS);

	imx_clk_scu2("mipi0_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_SLV_BUS);

	imx_clk_scu2("mipi0_dsi_phy_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PHY);
@@ -219,9 +235,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) 


	imx_clk_scu("mipi1_bypass_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_BYPASS);

	imx_clk_scu("mipi1_pixel_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PER);

	imx_clk_scu("mipi1_lvds_pixel_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2);

	imx_clk_scu("mipi1_lvds_bypass_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_BYPASS);

	imx_clk_scu("mipi1_lvds_phy_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3);

	imx_clk_scu2("mipi1_lvds_pixel_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2);

	imx_clk_scu2("mipi1_lvds_phy_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3);



	imx_clk_scu2("mipi1_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_MST_BUS);

	imx_clk_scu2("mipi1_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_SLV_BUS);

drivers/clk/imx/clk-pll14xx.c

+12 −11
Original line number Diff line number Diff line
@@ -104,15 +104,15 @@ static const struct imx_pll14xx_rate_table *imx_get_pll_settings( 
static long pll14xx_calc_rate(struct clk_pll14xx *pll, int mdiv, int pdiv,

			      int sdiv, int kdiv, unsigned long prate)

{

	u64 fvco = prate;

	u64 fout = prate;



	/* fvco = (m * 65536 + k) * Fin / (p * 65536) */

	fvco *= (mdiv * 65536 + kdiv);

	/* fout = (m * 65536 + k) * Fin / (p * 65536) / (1 << sdiv) */

	fout *= (mdiv * 65536 + kdiv);

	pdiv *= 65536;



	do_div(fvco, pdiv << sdiv);

	do_div(fout, pdiv << sdiv);



	return fvco;

	return fout;

}



static long pll1443x_calc_kdiv(int mdiv, int pdiv, int sdiv,
@@ -131,7 +131,7 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat 
{

	u32 pll_div_ctl0, pll_div_ctl1;

	int mdiv, pdiv, sdiv, kdiv;

	long fvco, rate_min, rate_max, dist, best = LONG_MAX;

	long fout, rate_min, rate_max, dist, best = LONG_MAX;

	const struct imx_pll14xx_rate_table *tt;



	/*
@@ -143,6 +143,7 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat 
	 * d) -32768 <= k <= 32767

	 *

	 * fvco = (m * 65536 + k) * prate / (p * 65536)

	 * fout = (m * 65536 + k) * prate / (p * 65536) / (1 << sdiv)

	 */



	/* First try if we can get the desired rate from one of the static entries */
@@ -173,8 +174,8 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat 
		pr_debug("%s: in=%ld, want=%ld Only adjust kdiv %ld -> %d\n",

			 clk_hw_get_name(&pll->hw), prate, rate,

			 FIELD_GET(KDIV_MASK, pll_div_ctl1), kdiv);

		fvco = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate);

		t->rate = (unsigned int)fvco;

		fout = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate);

		t->rate = (unsigned int)fout;

		t->mdiv = mdiv;

		t->pdiv = pdiv;

		t->sdiv = sdiv;
@@ -190,13 +191,13 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat 
			mdiv = clamp(mdiv, 64, 1023);



			kdiv = pll1443x_calc_kdiv(mdiv, pdiv, sdiv, rate, prate);

			fvco = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate);

			fout = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate);



			/* best match */

			dist = abs((long)rate - (long)fvco);

			dist = abs((long)rate - (long)fout);

			if (dist < best) {

				best = dist;

				t->rate = (unsigned int)fvco;

				t->rate = (unsigned int)fout;

				t->mdiv = mdiv;

				t->pdiv = pdiv;

				t->sdiv = sdiv;

drivers/clk/imx/clk-scu.c

+3 −1
Original line number Diff line number Diff line
@@ -886,8 +886,10 @@ struct clk_hw *__imx_clk_gpr_scu(const char *name, const char * const *parent_na 
		return ERR_PTR(-EINVAL);

	}



	if (!imx_clk_is_resource_owned(rsrc_id))

	if (!imx_clk_is_resource_owned(rsrc_id)) {

		kfree(clk_node);

		return NULL;

	}



	clk = kzalloc(sizeof(*clk), GFP_KERNEL);

	if (!clk) {