Commit f1b85ef1 authored by Daniel Golle's avatar Daniel Golle Committed by David S. Miller
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net: mediatek: mtk_eth_soc: clear MAC_MCR_FORCE_LINK only when MAC is up



Clearing bit MAC_MCR_FORCE_LINK which forces the link down too early
can result in MAC ending up in a broken/blocked state.

Fix this by handling this bit in the .mac_link_up and .mac_link_down
calls instead of in .mac_finish.

Fixes: b8fc9f30 ("net: ethernet: mediatek: Add basic PHYLINK support")
Suggested-by: default avatarMason-cw Chang <Mason-cw.Chang@mediatek.com>
Signed-off-by: default avatarDaniel Golle <daniel@makrotopia.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e54e09c0
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+3 −4
Original line number Diff line number Diff line
@@ -677,8 +677,7 @@ static int mtk_mac_finish(struct phylink_config *config, unsigned int mode,
	mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
	mcr_new = mcr_cur;
	mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
		   MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK |
		   MAC_MCR_RX_FIFO_CLR_DIS;
		   MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_RX_FIFO_CLR_DIS;

	/* Only update control register when needed! */
	if (mcr_new != mcr_cur)
@@ -694,7 +693,7 @@ static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode,
					   phylink_config);
	u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));

	mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN);
	mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK);
	mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}

@@ -803,7 +802,7 @@ static void mtk_mac_link_up(struct phylink_config *config,
	if (rx_pause)
		mcr |= MAC_MCR_FORCE_RX_FC;

	mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN;
	mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK;
	mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}