Commit f1c6be39 authored by Aurabindo Pillai's avatar Aurabindo Pillai Committed by Alex Deucher
Browse files

drm/amd/display: more liberal vmin/vmax update for freesync 

[Why]
FAMS2 expects vmin/vmax to be updated in the case when freesync is
off, but supported. But we only update it when freesync is enabled.

[How]
Change the vsync handler such that dc_stream_adjust_vmin_vmax() its called
irrespective of whether freesync is enabled. If freesync is supported,
then there is no harm in updating vmin/vmax registers.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3546


Reviewed-by: default avatarChiaHsuan Chung <chiahsuan.chung@amd.com>
Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarRay Wu <ray.wu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit cfb2d418)
Cc: stable@vger.kernel.org
parent 9984db63

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+11 −5
Original line number Diff line number Diff line
@@ -673,16 +673,22 @@ static void dm_crtc_high_irq(void *interrupt_params) 
	spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);



	if (acrtc->dm_irq_params.stream &&

	    acrtc->dm_irq_params.vrr_params.supported &&

	    acrtc->dm_irq_params.freesync_config.state ==

		    VRR_STATE_ACTIVE_VARIABLE) {

		acrtc->dm_irq_params.vrr_params.supported) {

		bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled;

		bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled;

		bool fs_active_var_en = acrtc->dm_irq_params.freesync_config.state == VRR_STATE_ACTIVE_VARIABLE;



		mod_freesync_handle_v_update(adev->dm.freesync_module,

					     acrtc->dm_irq_params.stream,

					     &acrtc->dm_irq_params.vrr_params);



		dc_stream_adjust_vmin_vmax(adev->dm.dc, acrtc->dm_irq_params.stream,

		/* update vmin_vmax only if freesync is enabled, or only if PSR and REPLAY are disabled */

		if (fs_active_var_en || (!fs_active_var_en && !replay_en && !psr_en)) {

			dc_stream_adjust_vmin_vmax(adev->dm.dc,

					acrtc->dm_irq_params.stream,

					&acrtc->dm_irq_params.vrr_params.adjust);

		}

	}



	/*

	 * If there aren't any active_planes then DCH HUBP may be clock-gated.