Commit f1eac46f authored by Lizhi Hou's avatar Lizhi Hou
Browse files

accel/amdxdna: Update firmware version check for latest firmware 



The latest firmware increases the major version number. Update
aie2_check_protocol() to accept and support the new firmware version.

Reviewed-by: default avatarMario Limonciello (AMD) <superm1@kernel.org>
Signed-off-by: default avatarLizhi Hou <lizhi.hou@amd.com>
Link: https://patch.msgid.link/20251219014356.2234241-2-lizhi.hou@amd.com
parent 1222e069

drivers/accel/amdxdna/aie2_pci.c

+9 −27
Original line number Diff line number Diff line
@@ -56,41 +56,23 @@ struct mgmt_mbox_chann_info { 
static int aie2_check_protocol(struct amdxdna_dev_hdl *ndev, u32 fw_major, u32 fw_minor)

{

	const struct aie2_fw_feature_tbl *feature;

	struct amdxdna_dev *xdna = ndev->xdna;



	/*

	 * The driver supported mailbox behavior is defined by

	 * ndev->priv->protocol_major and protocol_minor.

	 *

	 * When protocol_major and fw_major are different, it means driver

	 * and firmware are incompatible.

	 */

	if (ndev->priv->protocol_major != fw_major) {

		XDNA_ERR(xdna, "Incompatible firmware protocol major %d minor %d",

			 fw_major, fw_minor);

		return -EINVAL;

	}

	bool found = false;



	/*

	 * When protocol_minor is greater then fw_minor, that means driver

	 * relies on operation the installed firmware does not support.

	 */

	if (ndev->priv->protocol_minor > fw_minor) {

		XDNA_ERR(xdna, "Firmware minor version smaller than supported");

		return -EINVAL;

	}



	for (feature = ndev->priv->fw_feature_tbl; feature && feature->min_minor;

	     feature++) {

	for (feature = ndev->priv->fw_feature_tbl; feature->major; feature++) {

		if (feature->major != fw_major)

			continue;

		if (fw_minor < feature->min_minor)

			continue;

		if (feature->max_minor > 0 && fw_minor > feature->max_minor)

			continue;



		set_bit(feature->feature, &ndev->feature_mask);

		ndev->feature_mask |= feature->features;



		/* firmware version matches one of the driver support entry */

		found = true;

	}



	return 0;

	return found ? 0 : -EOPNOTSUPP;

}



static void aie2_dump_chann_info_debug(struct amdxdna_dev_hdl *ndev)

drivers/accel/amdxdna/aie2_pci.h

+2 −3
Original line number Diff line number Diff line
@@ -237,7 +237,8 @@ enum aie2_fw_feature { 
};



struct aie2_fw_feature_tbl {

	enum aie2_fw_feature feature;

	u64 features;

	u32 major;

	u32 max_minor;

	u32 min_minor;

};
@@ -246,8 +247,6 @@ struct aie2_fw_feature_tbl { 


struct amdxdna_dev_priv {

	const char			*fw_path;

	u64				protocol_major;

	u64				protocol_minor;

	const struct rt_config		*rt_config;

	const struct dpm_clk_freq	*dpm_clk_tbl;

	const struct aie2_fw_feature_tbl *fw_feature_tbl;

drivers/accel/amdxdna/npu1_regs.c

+3 −3
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include <drm/amdxdna_accel.h>

#include <drm/drm_device.h>

#include <drm/gpu_scheduler.h>

#include <linux/bits.h>

#include <linux/sizes.h>



#include "aie2_pci.h"
@@ -65,14 +66,13 @@ const struct dpm_clk_freq npu1_dpm_clk_table[] = { 
};



static const struct aie2_fw_feature_tbl npu1_fw_feature_table[] = {

	{ .feature = AIE2_NPU_COMMAND, .min_minor = 8 },

	{ .major = 5, .min_minor = 7 },

	{ .features = BIT_U64(AIE2_NPU_COMMAND), .min_minor = 8 },

	{ 0 }

};



static const struct amdxdna_dev_priv npu1_dev_priv = {

	.fw_path        = "amdnpu/1502_00/npu.sbin",

	.protocol_major = 0x5,

	.protocol_minor = 0x7,

	.rt_config	= npu1_default_rt_cfg,

	.dpm_clk_tbl	= npu1_dpm_clk_table,

	.fw_feature_tbl = npu1_fw_feature_table,

drivers/accel/amdxdna/npu4_regs.c

+6 −5
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include <drm/amdxdna_accel.h>

#include <drm/drm_device.h>

#include <drm/gpu_scheduler.h>

#include <linux/bits.h>

#include <linux/sizes.h>



#include "aie2_pci.h"
@@ -88,16 +89,16 @@ const struct dpm_clk_freq npu4_dpm_clk_table[] = { 
};



const struct aie2_fw_feature_tbl npu4_fw_feature_table[] = {

	{ .feature = AIE2_NPU_COMMAND, .min_minor = 15 },

	{ .feature = AIE2_PREEMPT, .min_minor = 12 },

	{ .feature = AIE2_TEMPORAL_ONLY, .min_minor = 12 },

	{ .major = 6, .min_minor = 12 },

	{ .features = BIT_U64(AIE2_NPU_COMMAND), .major = 6, .min_minor = 15 },

	{ .features = BIT_U64(AIE2_PREEMPT), .major = 6, .min_minor = 12 },

	{ .features = BIT_U64(AIE2_TEMPORAL_ONLY), .major = 6, .min_minor = 12 },

	{ .features = GENMASK_ULL(AIE2_TEMPORAL_ONLY, AIE2_NPU_COMMAND), .major = 7 },

	{ 0 }

};



static const struct amdxdna_dev_priv npu4_dev_priv = {

	.fw_path        = "amdnpu/17f0_10/npu.sbin",

	.protocol_major = 0x6,

	.protocol_minor = 12,

	.rt_config	= npu4_default_rt_cfg,

	.dpm_clk_tbl	= npu4_dpm_clk_table,

	.fw_feature_tbl = npu4_fw_feature_table,

drivers/accel/amdxdna/npu5_regs.c

+0 −2
Original line number Diff line number Diff line
@@ -64,8 +64,6 @@ 


static const struct amdxdna_dev_priv npu5_dev_priv = {

	.fw_path        = "amdnpu/17f0_11/npu.sbin",

	.protocol_major = 0x6,

	.protocol_minor = 12,

	.rt_config	= npu4_default_rt_cfg,

	.dpm_clk_tbl	= npu4_dpm_clk_table,

	.fw_feature_tbl = npu4_fw_feature_table,