Unverified Commit f2038c12 authored by Venkata Prasad Potturu's avatar Venkata Prasad Potturu Committed by Mark Brown
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ASoC: sof: amd: fix for firmware reload failure in Vangogh platform 



Setting ACP ACLK as clock source when ACP enters D0 state causing
firmware load failure, as per design clock source should be internal
clock.

Remove acp_clkmux_sel field so that ACP will use internal clock
source when ACP enters into D0 state.

Fixes: d0dab6b7 ("ASoC: SOF: amd: Add sof support for vangogh platform")

Signed-off-by: default avatarVenkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://patch.msgid.link/20240718062004.581685-1-venkataprasad.potturu@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 6f6a23d4

sound/soc/sof/amd/pci-vangogh.c

+0 −1
Original line number Diff line number Diff line
@@ -34,7 +34,6 @@ static const struct sof_amd_acp_desc vangogh_chip_info = { 
	.dsp_intr_base	= ACP5X_DSP_SW_INTR_BASE,

	.sram_pte_offset = ACP5X_SRAM_PTE_OFFSET,

	.hw_semaphore_offset = ACP5X_AXI2DAGB_SEM_0,

	.acp_clkmux_sel = ACP5X_CLKMUX_SEL,

	.probe_reg_offset = ACP5X_FUTURE_REG_ACLK_0,

};