Commit f22e6fdf authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'octeontx2-pf-extend-link-modes-support' 

Hariprasad Kelam says:

====================
Octeontx2-pf: extend link modes support

This series of patches adds multi advertise mode support along with
other improvements in link mode management code flow.

Patch1: Currently all SGMII modes 10/100/1000baseT are mapped with
        single firmware mode. This patch updates these link modes
        with corresponding firmware modes.

Patch2: Due to limitation in current kernel <-> firmware communication,
        link modes are divided into multiple groups, and identified
        with their group index.

Patch3: Adds support for multi advertise mode.
====================

Link: https://patch.msgid.link/20250625092107.9746-1-hkelam@marvell.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 4f5710ed 5f21226b

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+37 −18
Original line number Diff line number Diff line
@@ -1182,17 +1182,25 @@ static int cgx_link_usertable_index_map(int speed) 
static void set_mod_args(struct cgx_set_link_mode_args *args,

			 u32 speed, u8 duplex, u8 autoneg, u64 mode)

{

	/* Fill default values incase of user did not pass

	 * valid parameters

	int mode_baseidx;

	u8 cgx_mode;



	if (args->multimode) {

		args->mode |= mode;

		return;

	}



	/* Derive mode_base_idx and mode fields based

	 * on cgx_mode value

	 */

	if (args->duplex == DUPLEX_UNKNOWN)

		args->duplex = duplex;

	if (args->speed == SPEED_UNKNOWN)

		args->speed = speed;

	if (args->an == AUTONEG_UNKNOWN)

		args->an = autoneg;

	cgx_mode = find_first_bit((unsigned long *)&mode,

				  CGX_MODE_MAX);

	args->mode = mode;

	args->ports = 0;

	mode_baseidx = cgx_mode - 41;

	if (mode_baseidx > 0) {

		args->mode_baseidx = 1;

		args->mode = BIT_ULL(mode_baseidx);

	}

}



static void otx2_map_ethtool_link_modes(u64 bitmask,
@@ -1200,16 +1208,16 @@ static void otx2_map_ethtool_link_modes(u64 bitmask, 
{

	switch (bitmask) {

	case ETHTOOL_LINK_MODE_10baseT_Half_BIT:

		set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));

		set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII_10M_BIT));

		break;

	case  ETHTOOL_LINK_MODE_10baseT_Full_BIT:

		set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));

		set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII_10M_BIT));

		break;

	case  ETHTOOL_LINK_MODE_100baseT_Half_BIT:

		set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));

		set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII_100M_BIT));

		break;

	case  ETHTOOL_LINK_MODE_100baseT_Full_BIT:

		set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));

		set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII_100M_BIT));

		break;

	case  ETHTOOL_LINK_MODE_1000baseT_Half_BIT:

		set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));
@@ -1481,25 +1489,36 @@ int cgx_get_fwdata_base(u64 *base) 
}



int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,

		      struct cgx_lmac_fwdata_s *linkmodes,

		      int cgx_id, int lmac_id)

{

	struct cgx *cgx = cgxd;

	u64 req = 0, resp;

	u8 bit;



	if (!cgx)

		return -ENODEV;



	if (args.mode)

		otx2_map_ethtool_link_modes(args.mode, &args);

	if (!args.speed && args.duplex && !args.an)

		return -EINVAL;

	for_each_set_bit(bit, args.advertising,

			 __ETHTOOL_LINK_MODE_MASK_NBITS)

		otx2_map_ethtool_link_modes(bit, &args);



	if (args.multimode) {

		if (linkmodes->advertised_link_modes_own != CGX_CMD_OWN_NS)

			return -EBUSY;



		linkmodes->advertised_link_modes = args.mode;

		/* Update ownership */

		linkmodes->advertised_link_modes_own = CGX_CMD_OWN_FIRMWARE;

		args.mode = GENMASK_ULL(41, 0);

	}



	req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);

	req = FIELD_SET(CMDMODECHANGE_SPEED,

			cgx_link_usertable_index_map(args.speed), req);

	req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);

	req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);

	req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);

	req = FIELD_SET(CMDMODECHANGE_MODE_BASEIDX, args.mode_baseidx, req);

	req = FIELD_SET(CMDMODECHANGE_FLAGS, args.mode, req);



	return cgx_fwi_cmd_generic(req, &resp, cgx, lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/cgx.h

+1 −0
Original line number Diff line number Diff line
@@ -171,6 +171,7 @@ int cgx_set_fec(u64 fec, int cgx_id, int lmac_id); 
int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);

int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);

int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,

		      struct cgx_lmac_fwdata_s *linkmodes,

		      int cgx_id, int lmac_id);

u64 cgx_features_get(void *cgxd);

struct mac_ops *get_mac_ops(void *cgxd);

drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h

+31 −2
Original line number Diff line number Diff line
@@ -95,7 +95,31 @@ enum CGX_MODE_ { 
	CGX_MODE_100G_C2M,

	CGX_MODE_100G_CR4,

	CGX_MODE_100G_KR4,

	CGX_MODE_MAX /* = 29 */

	CGX_MODE_LAUI_2_C2C_BIT,

	CGX_MODE_LAUI_2_C2M_BIT,

	CGX_MODE_50GBASE_CR2_C_BIT,

	CGX_MODE_50GBASE_KR2_C_BIT,     /* = 30 */

	CGX_MODE_100GAUI_2_C2C_BIT,

	CGX_MODE_100GAUI_2_C2M_BIT,

	CGX_MODE_100GBASE_CR2_BIT,

	CGX_MODE_100GBASE_KR2_BIT,

	CGX_MODE_SFI_1G_BIT,

	CGX_MODE_25GBASE_CR_C_BIT,

	CGX_MODE_25GBASE_KR_C_BIT,

	CGX_MODE_SGMII_10M_BIT,

	CGX_MODE_SGMII_100M_BIT,        /* = 39 */

	CGX_MODE_2500_BASEX_BIT = 42, /* Mode group 1 */

	CGX_MODE_5000_BASEX_BIT,

	CGX_MODE_O_USGMII_BIT,

	CGX_MODE_Q_USGMII_BIT,

	CGX_MODE_2_5G_USXGMII_BIT,

	CGX_MODE_5G_USXGMII_BIT,

	CGX_MODE_10G_SXGMII_BIT,

	CGX_MODE_10G_DXGMII_BIT,

	CGX_MODE_10G_QXGMII_BIT,

	CGX_MODE_TP_BIT,

	CGX_MODE_FIBER_BIT,

	CGX_MODE_MAX /* = 53 */

};

/* REQUEST ID types. Input to firmware */

enum cgx_cmd_id {
@@ -258,7 +282,12 @@ struct cgx_lnk_sts { 
#define CMDMODECHANGE_SPEED		GENMASK_ULL(11, 8)

#define CMDMODECHANGE_DUPLEX		GENMASK_ULL(12, 12)

#define CMDMODECHANGE_AN		GENMASK_ULL(13, 13)

#define CMDMODECHANGE_PORT		GENMASK_ULL(21, 14)

/* this field categorize the mode ID(FLAGS) range to accommodate

 * more modes.

 * To specify mode ID range of 0 - 41, this field will be 0.

 * To specify mode ID range of 42 - 83, this field will be 1.

 */

#define CMDMODECHANGE_MODE_BASEIDX	GENMASK_ULL(21, 20)

#define CMDMODECHANGE_FLAGS		GENMASK_ULL(63, 22)



/* LINK_BRING_UP command timeout */

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+6 −3
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 


#include <linux/etherdevice.h>

#include <linux/sizes.h>

#include <linux/ethtool.h>



#include "rvu_struct.h"

#include "common.h"
@@ -658,7 +659,8 @@ struct cgx_lmac_fwdata_s { 
	u64 supported_link_modes;

	/* only applicable if AN is supported */

	u64 advertised_fec;

	u64 advertised_link_modes;

	u64 advertised_link_modes_own:1; /* CGX_CMD_OWN */

	u64 advertised_link_modes:63;

	/* Only applicable if SFP/QSFP slot is present */

	struct sfp_eeprom_s sfp_eeprom;

	struct phy_s phy;
@@ -675,12 +677,13 @@ struct cgx_set_link_mode_args { 
	u32 speed;

	u8 duplex;

	u8 an;

	u8 ports;

	u8 mode_baseidx;

	u8 multimode;

	u64 mode;

	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);

};



struct cgx_set_link_mode_req {

#define AUTONEG_UNKNOWN		0xff

	struct mbox_msghdr hdr;

	struct cgx_set_link_mode_args args;

};

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

+8 −1
Original line number Diff line number Diff line
@@ -1223,6 +1223,7 @@ int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu, 
				       struct cgx_set_link_mode_rsp *rsp)

{

	int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

	struct cgx_lmac_fwdata_s *linkmodes;

	u8 cgx_idx, lmac;

	void *cgxd;
@@ -1231,7 +1232,13 @@ int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu, 


	rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);

	cgxd = rvu_cgx_pdata(cgx_idx, rvu);

	rsp->status = cgx_set_link_mode(cgxd, req->args, cgx_idx, lmac);

	if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)

		linkmodes = &rvu->fwdata->cgx_fw_data_usx[cgx_idx][lmac];

	else

		linkmodes = &rvu->fwdata->cgx_fw_data[cgx_idx][lmac];



	rsp->status = cgx_set_link_mode(cgxd, req->args, linkmodes,

					cgx_idx, lmac);

	return 0;

}