Commit f244cdfa authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Move intel_drrs_compute_config() into intel_dp.c 



intel_drrs_compute_config() is 100% DP specific. DRRS on other
types of encoders wouldn't do any of these M2/N2 calculations
etc. So let's move this into intel_dp.c so all the DP state
calculation is more concentrated into one place.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220331112822.11462-10-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent c19909d0

drivers/gpu/drm/i915/display/intel_dp.c

+56 −3
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ 
#include "intel_dp_mst.h"

#include "intel_dpio_phy.h"

#include "intel_dpll.h"

#include "intel_drrs.h"

#include "intel_fifo_underrun.h"

#include "intel_hdcp.h"

#include "intel_hdmi.h"
@@ -1770,6 +1769,60 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp, 
		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);

}



static bool can_enable_drrs(struct intel_connector *connector,

			    const struct intel_crtc_state *pipe_config,

			    const struct drm_display_mode *downclock_mode)

{

	if (pipe_config->vrr.enable)

		return false;



	/*

	 * DRRS and PSR can't be enable together, so giving preference to PSR

	 * as it allows more power-savings by complete shutting down display,

	 * so to guarantee this, intel_drrs_compute_config() must be called

	 * after intel_psr_compute_config().

	 */

	if (pipe_config->has_psr)

		return false;



	return downclock_mode &&

		intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;

}



static void

intel_dp_drrs_compute_config(struct intel_connector *connector,

			     struct intel_crtc_state *pipe_config,

			     int output_bpp, bool constant_n)

{

	struct drm_i915_private *i915 = to_i915(connector->base.dev);

	const struct drm_display_mode *downclock_mode =

		intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode);

	int pixel_clock;



	if (!can_enable_drrs(connector, pipe_config, downclock_mode)) {

		if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder))

			intel_zero_m_n(&pipe_config->dp_m2_n2);

		return;

	}



	if (IS_IRONLAKE(i915) || IS_SANDYBRIDGE(i915) || IS_IVYBRIDGE(i915))

		pipe_config->msa_timing_delay = i915->vbt.edp.drrs_msa_timing_delay;



	pipe_config->has_drrs = true;



	pixel_clock = downclock_mode->clock;

	if (pipe_config->splitter.enable)

		pixel_clock /= pipe_config->splitter.link_count;



	intel_link_compute_m_n(output_bpp, pipe_config->lane_count, pixel_clock,

			       pipe_config->port_clock, &pipe_config->dp_m2_n2,

			       constant_n, pipe_config->fec_enable);



	/* FIXME: abstract this better */

	if (pipe_config->splitter.enable)

		pipe_config->dp_m2_n2.data_m *= pipe_config->splitter.link_count;

}



int

intel_dp_compute_config(struct intel_encoder *encoder,

			struct intel_crtc_state *pipe_config,
@@ -1878,7 +1931,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, 


	intel_vrr_compute_config(pipe_config, conn_state);

	intel_psr_compute_config(intel_dp, pipe_config, conn_state);

	intel_drrs_compute_config(intel_connector, pipe_config,

	intel_dp_drrs_compute_config(intel_connector, pipe_config,

				     output_bpp, constant_n);

	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);

	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);

drivers/gpu/drm/i915/display/intel_drrs.c

+0 −54
Original line number Diff line number Diff line
@@ -61,60 +61,6 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type) 
	return str[drrs_type];

}



static bool can_enable_drrs(struct intel_connector *connector,

			    const struct intel_crtc_state *pipe_config,

			    const struct drm_display_mode *downclock_mode)

{

	if (pipe_config->vrr.enable)

		return false;



	/*

	 * DRRS and PSR can't be enable together, so giving preference to PSR

	 * as it allows more power-savings by complete shutting down display,

	 * so to guarantee this, intel_drrs_compute_config() must be called

	 * after intel_psr_compute_config().

	 */

	if (pipe_config->has_psr)

		return false;



	return downclock_mode &&

		intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;

}



void

intel_drrs_compute_config(struct intel_connector *connector,

			  struct intel_crtc_state *pipe_config,

			  int output_bpp, bool constant_n)

{

	struct drm_i915_private *i915 = to_i915(connector->base.dev);

	const struct drm_display_mode *downclock_mode =

		intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode);

	int pixel_clock;



	if (!can_enable_drrs(connector, pipe_config, downclock_mode)) {

		if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder))

			intel_zero_m_n(&pipe_config->dp_m2_n2);

		return;

	}



	if (IS_IRONLAKE(i915) || IS_SANDYBRIDGE(i915) || IS_IVYBRIDGE(i915))

		pipe_config->msa_timing_delay = i915->vbt.edp.drrs_msa_timing_delay;



	pipe_config->has_drrs = true;



	pixel_clock = downclock_mode->clock;

	if (pipe_config->splitter.enable)

		pixel_clock /= pipe_config->splitter.link_count;



	intel_link_compute_m_n(output_bpp, pipe_config->lane_count, pixel_clock,

			       pipe_config->port_clock, &pipe_config->dp_m2_n2,

			       constant_n, pipe_config->fec_enable);



	/* FIXME: abstract this better */

	if (pipe_config->splitter.enable)

		pipe_config->dp_m2_n2.data_m *= pipe_config->splitter.link_count;

}



static void

intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc,

				     enum drrs_refresh_rate refresh_rate)

drivers/gpu/drm/i915/display/intel_drrs.h

+0 −3
Original line number Diff line number Diff line
@@ -23,9 +23,6 @@ void intel_drrs_invalidate(struct drm_i915_private *dev_priv, 
			   unsigned int frontbuffer_bits);

void intel_drrs_flush(struct drm_i915_private *dev_priv,

		      unsigned int frontbuffer_bits);

void intel_drrs_compute_config(struct intel_connector *connector,

			       struct intel_crtc_state *pipe_config,

			       int output_bpp, bool constant_n);

void intel_crtc_drrs_init(struct intel_crtc *crtc);



#endif /* __INTEL_DRRS_H__ */